Patents by Inventor Shinichiro Taguchi

Shinichiro Taguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4370680
    Abstract: In the recording operation of a video recorder, a color signal (3.58 MHz) is frequency-converted to a low frequency converted color signal (688 kHz) by a color signal processing device. In the reproducing operation of the video tape recorder, the regenerative low frequency converted signal (688 kHz) is reconverted to the color signal of original frequency (3.58 MHz) by the color signal processing device. The signal (3.58 MHz or 688 kHz) which has passed a switching circuit is gain-controlled by a color signal amplifier and is input to a balanced modulator. A converting signal (FO3=4.27 MHz) is also input to the balanced modulator. The output of the balanced modulator is obtained as a frequency-converted signal (688 kHz or 3.58 MHz) through a low-pass filter or a band-pass filter. The converting signal (F03=4.27 MHz) is obtained by balanced modulation, at a second balanced modulator, of an oscillation output (3.
    Type: Grant
    Filed: February 25, 1981
    Date of Patent: January 25, 1983
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Shinichiro Taguchi, Nobuya Nagao, Yutaka Ogihara
  • Patent number: 4364091
    Abstract: There are provided circuits for removing the equalizing pulses from the video signal. A composite sync signal separated from a video signal is applied to a gate circuit, so that only horizontal sync pulses are extracted. The gate pulse applied to the gate circuit is formed in the following manner. Clock pulses of a frequency 175/4 f.sub.H (f.sub.H : a horizontal scanning frequency and about 15,734 KHz), for example, is frequency-divided into a signal of a frequency 175/256 f.sub.H by a frequency divider. A reset circuit processes the frequency-divided output signal, the delayed sync signal and the inverted composite sync signal to form pulses in synchronism with the horizontal sync pulses. The pulses thus obtained reset the frequency divider. At the same timing of the pulse generation from the reset circuit, a gate pulse generating circuit generates pulses whose pulse widths are longer than the pulse widths of the horizontal pulses, which in turn are applied as the gate pulse to the gate circuit.
    Type: Grant
    Filed: February 18, 1981
    Date of Patent: December 14, 1982
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Shinichiro Taguchi, Nobuya Nagao, Yutaka Ogihara
  • Patent number: 4247867
    Abstract: The apparatus comprises a phase detection circuit for detecting the phase difference between two input signals to produce a single output which is supplied to charge a capacitor through a gate circuit and a unidirectionally conductive element. The terminal voltage of the capacitor is applied to one control terminal of a differential load circuit. The other control terminal of the load circuit is connected to receive the voltage produced by a bias circuit similar to the gate circuit.
    Type: Grant
    Filed: September 11, 1978
    Date of Patent: January 27, 1981
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Hiroshi Gomi, Shinichiro Taguchi
  • Patent number: 4182962
    Abstract: A semiconductor device which comprises a first current path formed of a first load, an n number of first transistors, each of whose bases is supplied with an input signal, a second transistor whose base is connected to a first bias power source, and an emitter resistor of said second transistor all connected in series between power supply terminals; and a second current path formed of a second load, a third transistor whose base is connected to a second bias power source through a base resistor, and an emitter resistor of the third transistor all connected in series between the power supply terminals, and wherein the resistance of the base resistor is chosen to be n times as large as that of the emitter resistor of the third transistor, thereby equalizing the amounts of current running through the first and second current paths.
    Type: Grant
    Filed: October 12, 1977
    Date of Patent: January 8, 1980
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Shinichiro Taguchi, Tokio Aketagawa
  • Patent number: 4174522
    Abstract: A composite color signal-handling circuit comprising a phase-shifter for shifting the phase of a composite color signal; a first gate circuit for extracting a chrominance signal out of an output signal from the phase shifter; a second gate circuit for extracting a burst signal out of said output signal from the phase-shifter; a circuit for controlling the amplitude of a chrominance signal extracted by the first gate circuit; a circuit for controlling the phase of a burst signal extracted by the second gate circuit; and means for composing together output signals from the amplitude-controlling circuit and phase-controlling circuit for reproducing a composite color signal, and wherein means is provided to minimize a difference between phase distortions occurring in a first signal transmission line extending from the first gate circuit to the composite color signal-reproducing means and a second signal transmission line extending from the second gate circuit to the composite color signal-reproducing means.
    Type: Grant
    Filed: October 12, 1977
    Date of Patent: November 13, 1979
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventor: Shinichiro Taguchi
  • Patent number: 4118741
    Abstract: In a circuit for processing a chroma signal the chroma signal is applied to a demodulator through a first phase shifter. The burst signal is applied to an automatic phase adjusting circuit including a phase detection circuit and a voltage-controlled oscillator. The output of the phase adjusting circuit is applied to a hue adjusting circuit including a second phase shifter and a mixing circuit connected to receive the output of the phase adjusting circuit and the output of the second phase shifter. A control voltage is applied to the mixing circuit for controlling the relative amplitude of the two inputs applied to the mixing circuit. The output of the hue adjusting circuit is applied to the demodulator to act as the subcarrier signal for demodulating the chroma signal. The first and second phase shifters are each comprised of a resistor and a capacitor and formed on the same integrated circuit semiconductor substrate.
    Type: Grant
    Filed: February 17, 1977
    Date of Patent: October 3, 1978
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Hiroshi Gomi, Shinichiro Taguchi