Patents by Inventor Shinichiro Uemura

Shinichiro Uemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230045978
    Abstract: An inhalation device with which it is possible to improve usability and promote users' satisfaction and safety with the inhalation device includes a device body housing to and from which a panel can be attached and detached, and includes a heating unit which heats an inhalation component source for generating an inhalation component; a power supply unit which feeds electric power to the heating unit; a sensor unit which detects attachment of the panel to the housing and which measures data associated with the panel; a storage unit which stores a plurality of operational profiles; and a control unit which identifies an operational profile associated with the data measured by the sensor unit and causes said inhalation device to operate according to the operational profile.
    Type: Application
    Filed: October 27, 2022
    Publication date: February 16, 2023
    Applicant: Japan Tobacco Inc.
    Inventors: Shinichiro UEMURA, Ryoji FUJITA, Kazutoshi SERITA, Hiroshi TEZUKA
  • Publication number: 20210037880
    Abstract: A smoking article includes aerosol generating material and a combustible heat source for heating the aerosol generating material. The combustible heat source includes a combustible material and an inductively heatable susceptor for heating and thereby igniting the combustible material. A smoking system including a smoking article and an igniter is also described, along with a method for aerosol generation.
    Type: Application
    Filed: April 25, 2019
    Publication date: February 11, 2021
    Applicant: JT International S.A.
    Inventors: Andrew Robert John Rogan, Takashi Hasegawa, Eduardo Jose Garcia Garcia, Shinichiro Uemura
  • Patent number: 9673769
    Abstract: A variable gain transconductance amplifier includes an amplifier transistor connected to an input node, a cascode transistor having a source connected to a drain of the amplifier transistor and having a drain connected to an output node, and a switching circuit connecting or disconnecting a node to which the amplifier transistor and the cascode transistor are connected to or from a fixed potential in a switchable manner. A variable gain circuit may include the variable gain transconductance amplifier.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: June 6, 2017
    Assignee: SOCIONEXT INC.
    Inventors: Takafumi Nasu, Shinichiro Uemura
  • Patent number: 9564858
    Abstract: A parallel resonant circuit with excellent distortion and saturation characteristics is provided at low power consumption. A first power-supply voltage is applied to the parallel resonant circuit. In the parallel resonant circuit, a variable resistor includes one or more parallel-connected branches. Each of the branches includes a series circuit of a resistor and a MOS switch. A second power supply supplies power of control signals applied to respective gates of the MOS switches, and supplies back gate voltages to the MOS switches. A power-supply voltage of the second power supply is higher than the first power-supply voltage.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: February 7, 2017
    Assignee: SOCIONEXT INC.
    Inventors: Takafumi Nasu, Shinichiro Uemura, Atsushi Ohara
  • Publication number: 20160156323
    Abstract: A variable gain transconductance amplifier includes an amplifier transistor connected to an input node, a cascode transistor having a source connected to a drain of the amplifier transistor and having a drain connected to an output node, and a switching circuit connecting or disconnecting a node to which the amplifier transistor and the cascode transistor are connected to or from a fixed potential in a switchable manner. A variable gain circuit may include the variable gain transconductance amplifier.
    Type: Application
    Filed: February 3, 2016
    Publication date: June 2, 2016
    Inventors: Takafumi NASU, Shinichiro UEMURA
  • Publication number: 20160156315
    Abstract: A parallel resonant circuit with excellent distortion and saturation characteristics is provided at low power consumption. A first power-supply voltage is applied to the parallel resonant circuit. In the parallel resonant circuit, a variable resistor includes one or more parallel-connected branches. Each of the branches includes a series circuit of a resistor and a MOS switch. A second power supply supplies power of control signals applied to respective gates of the MOS switches, and supplies back gate voltages to the MOS switches. A power-supply voltage of the second power supply is higher than the first power-supply voltage.
    Type: Application
    Filed: February 5, 2016
    Publication date: June 2, 2016
    Inventors: Takafumi NASU, Shinichiro UEMURA, Atsushi OHARA
  • Patent number: 8450836
    Abstract: A digital circuit portion (6) and an analog circuit portion (7) are formed in a surface portion of a semiconductor substrate (4). A via (20) is formed in a region between the digital circuit portion (6) and the analog circuit portion (7). The via (20) extends through the semiconductor substrate (4) from a front surface to a back surface thereof, and is made of a dielectric (2) having its surface covered by a metal (1). The metal (1) is grounded. Signal interference between the analog circuit portion (6) and the digital circuit portion (7) is reduced by the via (20).
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: May 28, 2013
    Assignee: Panasonic Corporation
    Inventors: Shinichiro Uemura, Yukio Hiraoka, Takayuki Kai
  • Publication number: 20110266646
    Abstract: A digital circuit portion (6) and an analog circuit portion (7) are formed in a surface portion of a semiconductor substrate (4). A via (20) is formed in a region between the digital circuit portion (6) and the analog circuit portion (7). The via (20) extends through the semiconductor substrate (4) from a front surface to a back surface thereof, and is made of a dielectric (2) having its surface covered by a metal (1). The metal (1) is grounded. Signal interference between the analog circuit portion (6) and the digital circuit portion (7) is reduced by the via (20).
    Type: Application
    Filed: July 12, 2011
    Publication date: November 3, 2011
    Applicant: Panasonic Corporation
    Inventors: Shinichiro UEMURA, Yukio Hiraoka, Takayuki Kai
  • Patent number: 7973609
    Abstract: A frequency synthesizer includes a digitally-controlled oscillator and an oscillation frequency control unit. The digitally-controlled oscillator includes a loop-shaped transmission line path having an odd number of parallel portions in each of which two conductors are arranged in parallel to each other with a space therebetween, and an odd number of intersection portions in each of which two conductors intersect spatially, an active circuit coupled between the two conductors, and a first variable capacitance unit and a second variable capacitance unit. The oscillation frequency control unit includes a ?? modulation circuit for subjecting to ?? modulation a first control signal for switching a high capacitance state and a low capacitance state of a first variable capacitance element included in the first variable capacitance unit.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: July 5, 2011
    Assignee: Panasonic Corporation
    Inventors: Atsushi Ohara, Shinichiro Uemura, Hisashi Adachi
  • Patent number: 7956444
    Abstract: A semiconductor device includes a layered region (104) formed in a semiconductor substrate (101) of a first conductivity type, and an electrode pad (106) formed on the semiconductor substrate with an interlayer insulating film (105) interposed therebetween and placed above the layered region. The layered region includes a first impurity diffusion region (102), a second impurity diffusion region (103) formed on the first impurity diffusion region, and a third impurity diffusion region (102x) formed on the first impurity diffusion region and surrounding a periphery of the second impurity diffusion region. a conductivity type of the first impurity diffusion region and a conductivity type of the third impurity diffusion region are a second conductivity type, and a conductivity type of the second impurity diffusion region is the first conductivity type.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: June 7, 2011
    Assignee: Panasonic Corporation
    Inventors: Takahito Miyazaki, Shinichiro Uemura
  • Patent number: 7754582
    Abstract: A laser processing method including a first step of forming a first groove and a second step of forming a second groove on the workpiece. In the first step, the laser beam is intermittently applied to the first street except the intersections between the first street and the second street, thereby forming a discontinuous groove as the first groove in such a manner that each intersection is not grooved. In the second step, the laser beam is continuously applied to the second street, thereby forming a continuous groove as the second groove intersecting the first groove in such a manner that each intersection is grooved by the second groove. In the second step, heat generated at a portion immediately before each intersection is passed through the intersection to be dissipated forward, thereby suppressing overheating at this portion.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: July 13, 2010
    Assignee: Disco Corporation
    Inventors: Hiroshi Morikazu, Shinichiro Uemura
  • Publication number: 20100156549
    Abstract: A voltage controlled oscillator includes a loop-shaped transmission line, an active circuit connected to a signal line, and a variable capacitor block connected to the signal line and having a plurality of variable capacitor units. Each variable capacitor unit includes a variable capacitor element, a control terminal for applying a control voltage to the variable capacitor element, and a reference voltage terminal for applying a reference voltage to the variable capacitor element. At least two variable capacitor units receive different reference voltages.
    Type: Application
    Filed: September 1, 2009
    Publication date: June 24, 2010
    Inventors: Shinichiro Uemura, Atsushi Ohara, Masatake Irie
  • Publication number: 20100134183
    Abstract: A semiconductor device includes a layered region (104) formed in a semiconductor substrate (101) of a first conductivity type, and an electrode pad (106) formed on the semiconductor substrate with an interlayer insulating film (105) interposed therebetween and placed above the layered region. The layered region includes a first impurity diffusion region (102), a second impurity diffusion region (103) formed on the first impurity diffusion region, and a third impurity diffusion region (102x) formed on the first impurity diffusion region and surrounding a periphery of the second impurity diffusion region. a conductivity type of the first impurity diffusion region and a conductivity type of the third impurity diffusion region are a second conductivity type, and a conductivity type of the second impurity diffusion region is the first conductivity type.
    Type: Application
    Filed: December 17, 2008
    Publication date: June 3, 2010
    Inventors: Takahito Miyazaki, Shinichiro Uemura
  • Publication number: 20100066416
    Abstract: A frequency synthesizer includes a digitally-controlled oscillator and an oscillation frequency control unit. The digitally-controlled oscillator includes a loop-shaped transmission line path having an odd number of parallel portions in each of which two conductors are arranged in parallel to each other with a space therebetween, and an odd number of intersection portions in each of which two conductors intersect spatially, an active circuit coupled between the two conductors, and a first variable capacitance unit and a second variable capacitance unit. The oscillation frequency control unit includes a ?? modulation circuit for subjecting to ?? modulation a first control signal for switching a high capacitance state and a low capacitance state of a first variable capacitance element included in the first variable capacitance unit.
    Type: Application
    Filed: August 5, 2009
    Publication date: March 18, 2010
    Inventors: Atsushi OHARA, Shinichiro Uemura, Hisashi Adachi
  • Publication number: 20090203193
    Abstract: A laser processing method including a first step of forming a first groove and a second step of forming a second groove on the workpiece. In the first step, the laser beam is intermittently applied to the first street except the intersections between the first street and the second street, thereby forming a discontinuous groove as the first groove in such a manner that each intersection is not grooved. In the second step, the laser beam is continuously applied to the second street, thereby forming a continuous groove as the second groove intersecting the first groove in such a manner that each intersection is grooved by the second groove. In the second step, heat generated at a portion immediately before each intersection is passed through the intersection to be dissipated forward, thereby suppressing overheating at this portion.
    Type: Application
    Filed: January 30, 2009
    Publication date: August 13, 2009
    Applicant: DISCO CORPORATION
    Inventors: Hiroshi Morikazu, Shinichiro Uemura
  • Publication number: 20090103652
    Abstract: The switching operation of a high frequency switch connected in series downstream from the amplifier circuit produces a load variation on the amplifier circuit, and serially connecting the amplifier circuit and high frequency switch causes a drop in gain due to an in-band mismatch. An amplifier circuit is connected to the input pin for input a high frequency signal, and the output of the amplifier circuit branches to serially connected resistances. An RC filter composed of a resistance and a capacitance is parallel connected between the resistances and the downstream high frequency switches. Input pins for inputting a high frequency signal are connected to the gates of the high frequency switches. Capacitances are parallel connected downstream from the high frequency switches, forming a switched capacitor circuit connected to the output pins.
    Type: Application
    Filed: September 15, 2008
    Publication date: April 23, 2009
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Mabuchi, Jinichi Tamura, Shinichiro Uemura, Miki Yamanaka
  • Publication number: 20020015418
    Abstract: An integrated messaging system is characterized in that: a media conversion port packetizes a message from a circuit switching network through which a subscriber's calling signal is sent; an IP store and reproduction port converts the packetized message into a voice file; a mail conversion port converts the voice file into an e-mail attachment-file form; and an e-mail server stores the message. Further, in the integrated messaging system: the IP store and reproduction port converts a message from a packet switching network, through which another subscriber's calling signal is sent, into the voice file; the mail conversion port converts the voice file into the e-mail attachment-file form; and the e-mail server stores the message. Consequently, an integrated messaging system can be realized with a simple structure wherein multimedia messages are stored in one place, and thus managed easily.
    Type: Application
    Filed: July 25, 2001
    Publication date: February 7, 2002
    Applicant: NEC Corporation
    Inventor: Shinichiro Uemura