Abstract: A polycrystal silicon layer is used to a cell plate of a capacitor in a memory cell portion including a plurality of memory cells, and a Si.sub.3 N.sub.4 film layer is used to form a capacitor above a first transistor in the memory cell. The polycrystal silicon layer and Si.sub.3 N.sub.4 film layer formed above a second transistor in a peripheral circuit are simultaneously removed by an etching method during the same process. Therefore an aspect ratio and a shape of a contact hole in the peripheral circuit are improved, and thus the step coverage of the wiring in the peripheral circuit can be improved.

Abstract: A polycrystal silicon layer is used to a cell plate of a capacitor in a memory cell portion including a plurality of memory cells, and a Si.sub.3 N.sub.4 film layer is used to form a capacitor above a first transistor in the memory cell. The polycrystal silicon layer and Si.sub.3 N.sub.4 film layer formed above a second transistor in a peripheral circuit are simultaneously removed by an etching method during the same process. Therefore an aspect ratio and a shape of a contact hole in the peripheral circuit are improved, and thus the step coverage of the wiring in the peripheral circuit can be improved.

Abstract: The conductive material film, e.g. a polysilicon film, is anisotropically etched for forming a pattern, e.g. a storage electrode, and a base insulating film, e.g. an insulating film made of SiO.sub.2, is isotropically etched for exposing the sidewall or backside of the conductive material film during a manufacturing process of the semiconductor element, e.g. a memory cell including a transistor and a capacitor. A belt cover film, including the conductive material film, is formed to cover the surrounding and vicinity of a chip in which the semiconductor element is formed, at the same time when the conductive material film is formed.

Abstract: The conductive material film, e.g. a polysilicon film, is anisotropically etched for forming a pattern, e.g. a storage electrode, and a base insulating film, e.g. an insulating film made of SiO.sub.2, is isotropically etched for exposing the sidewall or backside of the conductive material film during a manufacturing process of the semiconductor element, e.g. a memory cell including a transistor and a capacitor. A belt cover film, including the conductive material film, is formed to cover the surrounding and vicinity of a chip in which the semiconductor element is formed, at the same time when the conductive material film is formed.

Abstract: A high voltage MOS transistor includes a semiconductor substrate (1) of a first semiconductor type, a gate electrode (14) formed on the semiconductor substrate via a gate oxide layer (13), first and second diffusion regions (15, 16) formed in the semiconductor substrate on both sides of the gate electrode and being of a second semiconductor type opposite to the first semiconductor type, and an electrode (38) which is directly connected to the first diffusion region (15) and is made up of a conductor layer (49) including polysilicon. An impurity concentration of the conductor layer (49) including the polysilicon is higher than an impurity concentration of the first diffusion region (15).

Abstract: A high voltage MOS transistor includes a semiconductor substrate (1) of a first semiconductor type, a gate electrode (14) formed on the semiconductor substrate via a gate oxide layer (13), first and second diffusion regions (15, 16) formed in the semiconductor substrate on both sides of the gate electrode and being of a second semiconductor type opposite to the first semiconductor type, and an electrode (38) which is directly connected to the first diffusion region (15) and is made up of a conductor layer (49) including polysilicon. An impurity concentration of the conductor layer (49) including the polysilicon is higher than an impurity concentration of the first diffusion region (15).