Patents by Inventor Shinji Amano
Shinji Amano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11965315Abstract: The invention of the present application intends to provide a work machine that can ensure high operability by preventing abrupt actuation of an actuator and a shock to a machine body by use of a bleed-off function at the time of starting of the actuator and that can improve the energy-saving performance by reducing a bleed-off flow rate after the starting of the actuator. For this purpose, a controller opens a bleed-off valve at a timing at which an operation device is being operated and before a flow rate of a hydraulic pump starts increasing, and closes the bleed-off valve at a timing at which the operation device is being operated and after the flow rate of the hydraulic pump has started increasing.Type: GrantFiled: December 8, 2021Date of Patent: April 23, 2024Assignee: Hitachi Construction Machinery Co., Ltd.Inventors: Kento Kumagai, Shinya Imura, Yasutaka Tsuruga, Takaaki Chiba, Hiroaki Amano, Shinji Nishikawa, Akihiro Narazaki, Genroku Sugiyama, Shinjiro Yamamoto
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Patent number: 11966669Abstract: A molten metal component estimation device including: an input device configured to receive measurement information about a refining facility including measurement results regarding an optical characteristic; a model database that stores model expressions and model parameters, regarding a blowing process reaction, including a model expression and model parameters representing a relation between the oxygen efficiency in decarburization and a carbon concentration in a molten metal in the refining facility; and a processor configured to: estimate component concentrations of the molten metal including the carbon concentration in the molten metal by using the measurement information, the model expressions and the model parameters; estimate the carbon concentration in the molten metal based on the measurement results; and determine the model expression and the model parameters to be used when estimating the component concentrations of the molten metal, based on the estimation result of the carbon concentration in tType: GrantFiled: April 3, 2019Date of Patent: April 23, 2024Assignee: JFE STEEL CORPORATIONInventors: Hiroto Kase, Shinji Tomiyama, Yukio Takahashi, Shota Amano, Toshifumi Kodama
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Patent number: 11959147Abstract: A top-blowing lance nozzle is configured to freely switch an adequate expansion condition so as to control an oxygen-blowing amount and a jetting velocity independently of each other without requiring a plurality of lance nozzles or a mechanically movable part. A lance nozzle is configured to blow refining oxygen to molten iron charged in a reaction vessel while a gas is blown from a top-blowing lance to the molten iron. One or more blowing holes for blowing a working gas are on an inner wall side surface of the nozzle, at a site where the lance nozzle has a minimum cross-sectional area in a nozzle axis direction or at a neighboring site of the site.Type: GrantFiled: April 2, 2020Date of Patent: April 16, 2024Assignee: JFE STEEL CORPORATIONInventors: Yumi Murakami, Nobuhiko Oda, Yusuke Fujii, Goro Okuyama, Shota Amano, Shinji Koseki, Shingo Sato, Yukio Takahashi, Ryo Kawabata, Naoki Kikuchi, Atsuo Yuasa
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Publication number: 20230165756Abstract: An edible body marking device that forms a marking pattern on an edible body by scanning a laser spot. The marking pattern includes, as additional information, positional information of one or more index dots that are made by partially deforming or removing one or more dots of the laser spot, or newly adding one or more dots of the laser spot with respect to a basic pattern that is obtained by forming a plurality of the dots of the laser spot.Type: ApplicationFiled: January 28, 2023Publication date: June 1, 2023Inventors: Masaru TSUKAMOTO, Shigenobu HARADA, Hiroshi SAKURAMOTO, Shinji AMANO, Daiya FUJINAKA
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Patent number: 9606684Abstract: The present invention provides a touch panel controller for controlling even a large touch panel with little EMI. The touch panel controller of the present invention includes a plurality of driving circuits (DC1 through DCm) for driving respective drive lines (DL1 through DLm) of a capacitive touch panel unit 2 by supplying driving signals (Ds) to the respective drive lines (DL1 through DLm), and a rise/fall time of each of the driving signals (Ds) is variable.Type: GrantFiled: June 18, 2013Date of Patent: March 28, 2017Assignee: SHARP KABUSHIKI KAISHAInventors: Eiji Nakaue, Shohji Sakurai, Mutsumi Hamaguchi, Shinji Amano, Narakazu Shimomura
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Publication number: 20150363021Abstract: The present invention provides a touch panel controller for controlling even a large touch panel with little EMI. The touch panel controller of the present invention includes a plurality of driving circuits (DC1 through DCm) for driving respective drive lines (DL1 through DLm) of a capacitive touch panel unit 2 by supplying driving signals (Ds) to the respective drive lines (DL1 through DLm), and a rise/fall time of each of the driving signals (Ds) is variable.Type: ApplicationFiled: June 18, 2013Publication date: December 17, 2015Applicant: SHARP KABUSHIKI KAISHAInventors: Eiji NAKAUE, Shohji SAKURAI, Mutsumi HAMAGUCHI, Shinji AMANO, Narakazu SHIMOMURA
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Patent number: 9129851Abstract: In a semiconductor device having a vertical semiconductor element configured to pass an electric current between an upper electrode and a lower electrode, a field stop layer includes a phosphorus/arsenic layer doped with phosphorus or arsenic and a proton layer doped with proton. The phosphorus/arsenic layer is formed from a back side of a semiconductor substrate to a predetermined depth. The proton layer is deeper than the phosphorus/arsenic layer. An impurity concentration of the proton layer peaks inside the phosphorus/arsenic layer and gradually, continuously decreases at a depth greater than the phosphorus/arsenic layer.Type: GrantFiled: October 9, 2012Date of Patent: September 8, 2015Assignee: DENSO CORPORATIONInventors: Kenji Kouno, Shinji Amano
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Publication number: 20150008478Abstract: A manufacturing method of a semiconductor device includes applying at least one of a particle ray and a radial ray to a surface of a semiconductor substrate on which a transistor including a gate insulation film and a gate electrode has been formed adjacent to the surface, and annealing the semiconductor substrate for recovering a crystal defect contained in the gate insulation film and the gate electrode, after the applying. Further, the manufacturing method includes pre-annealing for reducing a content of a hydrogen molecule and a water molecule contained in the gate insulation film and the gate electrode to a predetermined concentration, before the applying. In the semiconductor device manufactured by this method, a concentration of thermally stable defect existing in the gate insulation film is reduced to a predetermined concentration.Type: ApplicationFiled: January 22, 2013Publication date: January 8, 2015Inventors: Weitao Cheng, Shinji Amano, Yoshifumi Okabe, Tomofusa Shiga
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Publication number: 20140299915Abstract: In a semiconductor device having a vertical semiconductor element configured to pass an electric current between an upper electrode and a lower electrode, a field stop layer includes a phosphorus/arsenic layer doped with phosphorus or arsenic and a proton layer doped with proton. The phosphorus/arsenic layer is formed from a back side of a semiconductor substrate to a predetermined depth. The proton layer is deeper than the phosphorus/arsenic layer. An impurity concentration of the proton layer peaks inside the phosphorus/arsenic layer and gradually, continuously decreases at a depth greater than the phosphorus/arsenic layer.Type: ApplicationFiled: October 9, 2012Publication date: October 9, 2014Inventors: Kenji Kouno, Shinji Amano
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Patent number: 8242536Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface. A main region and a sensing region are formed on the first surface side of the semiconductor substrate. A RC-IGBT is formed in the main region and a sensing element for passing electric currents proportional to electric currents flowing through the RC-IGBT is formed in the sensing region. A collector region and a cathode region of the sensing element are formed on the second surface side of the semiconductor substrate. The collector region is located directly below the sensing region in a thickness direction of the semiconductor substrate. The cathode region is not located directly below the sensing region in the thickness direction.Type: GrantFiled: January 26, 2010Date of Patent: August 14, 2012Assignee: DENSO CORPORATIONInventors: Hiromitsu Tanabe, Kenji Kouno, Yukio Tsuzuki, Shinji Amano
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Publication number: 20100187567Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface. A main region and a sensing region are formed on the first surface side of the semiconductor substrate. A RC-IGBT is formed in the main region and a sensing element for passing electric currents proportional to electric currents flowing through the RC-IGBT is formed in the sensing region. A collector region and a cathode region of the sensing element are formed on the second surface side of the semiconductor substrate. The collector region is located directly below the sensing region in a thickness direction of the semiconductor substrate. The cathode region is not located directly below the sensing region in the thickness direction.Type: ApplicationFiled: January 26, 2010Publication date: July 29, 2010Applicant: DENSO CORPORATIONInventors: Hiromitsu Tanabe, Kenji Kouno, Yukio Tsuzuki, Shinji Amano
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Patent number: 7616859Abstract: A semiconductor device includes a spaced-channel IGBT and an antiparallel diode that are formed in a same semiconductor substrate. The IGBT includes a base layer and insulated gate trenches by which the base layer is divided into a body region connected to an emitter and a floating region disconnected from the emitter. The IGBT is formed in a cell region of an IGBT region, and the diode is formed in a diode region. A boundary region of the IGBT region is located between the cell region and the diode region. A spacing between adjacent gate trenches in the boundary region is less than a spacing between adjacent gate trenches between which the floating region is located in the cell region.Type: GrantFiled: June 12, 2008Date of Patent: November 10, 2009Assignee: DENSO CORPORATIONInventors: Norihito Tokura, Hiroki Sone, Shinji Amano, Hisato Kato
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Publication number: 20090001411Abstract: A semiconductor device includes a spaced-channel IGBT and an antiparalell diode that are formed in a same semiconductor substrate. The IGBT includes a base layer and insulated gate trenches by which the base layer is divided into a body region connected to an emitter and a floating region disconnected from the emitter. The IGBT is formed in a cell region of an IGBT region, and the diode is formed in a diode region. A boundary region of the IGBT region is located between the cell region and the diode region. A spacing between adjacent gate trenches in the boundary region is less than a spacing between adjacent gate trenches between which the floating region is located in the cell region.Type: ApplicationFiled: June 12, 2008Publication date: January 1, 2009Applicant: DENSO CORPORATIONInventors: Norihito Tokura, Hiroki Sone, Shinji Amano, Hisato Kato
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Publication number: 20090003496Abstract: A reception apparatus is provided with a semiconductor integrated circuit device and a UHF-fixed band-pass filter provided in a stage preceding the semiconductor integrated circuit device. The semiconductor integrated circuit device includes a frequency converter, a to-be-frequency-converted-signal transmission line through which a to-be-frequency-converted signal is fed to the frequency converter, a local-oscillation-signal transmission line through which a local oscillation signal is fed to the frequency converter and an unnecessary-signal attenuation circuit, provided in the to-be-frequency-converted-signal transmission line, that attenuates an unnecessary signal included in signals transmitted through the to-be-frequency-converted-signal transmission line.Type: ApplicationFiled: March 31, 2008Publication date: January 1, 2009Inventor: Shinji AMANO
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Publication number: 20070075798Abstract: A voltage control oscillator that is provided to suitably receive digital broadcasting and is produced at low costs includes: a resonance circuit that includes variable capacitors, each having a capacitance controlling terminal, that are provided parallel to each other and are connected to an inductor, the circuit resonating at a resonant frequency that varies depending upon a sum of (i) an inductance of the inductor and (ii) capacitances of the variable capacitors; and at least one switch to determine what should be connected to at least one of said capacitance controlling terminals.Type: ApplicationFiled: September 28, 2006Publication date: April 5, 2007Inventor: Shinji Amano
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Patent number: 7155188Abstract: Dispersing directions of oscillation frequency variable ranges of all voltage controlled oscillators provided in an integrated circuit are uniformed, and not only a range covering a frequency regardless of whether a dispersion occurs or not, but also a range covering the frequency only in a case where the dispersion occurs is used as the frequency variable range of the voltage controlled oscillator, and the frequency variable ranges of the voltage controlled oscillators are set so as to be successive with respect to each other, so that a small number of voltage controlled oscillators can cover a wide frequency variable range. Thus, the integrated circuit having voltage controlled oscillators therein is miniaturized.Type: GrantFiled: September 27, 2002Date of Patent: December 26, 2006Assignee: Sharp Kabushiki KaishaInventors: Mitsuhiro Noboru, Hiroshi Isoda, Shinji Amano
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Patent number: 7045879Abstract: The principal surface of a p-type SiC substrate (1) is formed of a face intersecting (0001) Si-face at 10 to 16°. An n+ source region (2) and an n+ drain region (3) are formed in a surface layer portion at the principal surface of the p-type SiC substrate (1) so as to be separated from each other. A gate electrode (5) is formed on a gate oxide film (4) on the principal surface of the p-type SiC substrate (1).Type: GrantFiled: December 24, 2003Date of Patent: May 16, 2006Assignee: Denso CorporationInventors: Yoshiyuki Hisada, Eiichi Okuno, Yoshihito Mitsuoka, Shinji Amano, Takeshi Endo, Shinichi Mukainakano, Ayahiko Ichimiya
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Patent number: 6977545Abstract: An FM signal receiver for use in receiving a burst signals as in a Bluetooth system includes a BPF and a frequency-demodulation circuit, each having, for example, a phase shifter, which is constructed from similar or related circuitry so as to enable adjustment of the frequency characteristics of the BPF and frequency-demodulation circuit through an identical control signal. A short-circuit switch is disposed linking the input and output terminals of an amplifier. A control circuit opens the switch in a receiving operation and closes the switch in an adjusting operation. Thus, adjustment is carried out without using the amplifier. Therefore, an amplifier offset does not affect the frequency-to-voltage conversion by the frequency-demodulation circuit in the adjusting of the frequency-demodulation circuit and similar adjusting of the BPF. Thus, the BPF is prevented from being incorrectly adjusted due to the offset. The BPF characteristics are suitably adjusted.Type: GrantFiled: March 25, 2004Date of Patent: December 20, 2005Assignee: Sharp Kabushiki KaishaInventors: Shinji Amano, Yusuke Kishino
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Publication number: 20050121701Abstract: In a semiconductor device, risk of malfunction of a heat sensing diode on a main side of a vertical power semiconductor element is minimized by arranging the diode at the center of the element. Because the heat sensing diode is disposed at the center of the main side of the semiconductor element, the diode is protected from breakage and heat accumulation even when an excessive heat causes a crack at the periphery of a conductive bonding material that connects the element and the metal bodies on both sides of the element.Type: ApplicationFiled: December 1, 2004Publication date: June 9, 2005Inventors: Naohiko Hirano, Shinji Amano, Rika Sakakibara
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Patent number: 6850113Abstract: A demodulator includes a reference signal generator for generating a reference signal, an FM demodulation circuit for demodulating a modulated signal, and a control circuit for controlling demodulation sensitivity of the FM demodulation circuit. The control circuit controls the demodulation sensitivity of the FM demodulation circuit so that an output signal, obtained when the reference signal from the reference signal generator is inputted to the FM demodulation circuit, becomes a specified value. This structure can stabilize the demodulation sensitivity of the demodulation circuit while restraining increases in circuit scale and current consumption, and can adjust dispersions in the demodulation sensitivities of the respective ICs due to relative errors of a resistance value of a resistor and a capacity value of a condenser in an IC, the resistor and the condenser constituting the demodulator.Type: GrantFiled: March 21, 2002Date of Patent: February 1, 2005Assignee: Sharp Kabushiki KaishaInventor: Shinji Amano