Patents by Inventor Shinji Kawabuchi

Shinji Kawabuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10810962
    Abstract: A shift register circuit that controls back gate voltage of a transistor with a simple configuration and at a low cost, and a display panel. In the shift register circuit, shift registers include: an output circuit, a charge and discharge circuit, a first power supply terminal, and at least one back gate voltage generation circuit. The output circuit or the charge and discharge circuit includes at least one transistor. The back gate voltage generation circuit includes a back gate node. The back gate node is connected to the back gate electrode of the transistor. The back gate voltage generation circuit changes a voltage of the back gate node according to a voltage of a gate electrode of the transistor. The back gate voltage generation circuit is supplied with a drive voltage from the first power supply terminal.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: October 20, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takeshi Ono, Masafumi Agari, Toshiaki Fujino, Shinji Kawabuchi
  • Patent number: 10656482
    Abstract: A channel layer is formed of an oxide semiconductor. A first insulating film is provided on the channel layer, a source line, and a drain electrode, and includes a drain contact hole which reaches the drain electrode. A pixel electrode is provided on the first insulating film, includes a connection conductive layer which is connected to the drain electrode by the drain contact hole, and is formed of a transparent conductive material. The pixel electrode is covered with a second insulating film. A common electrode is provided on the second insulating film, includes an opening which faces the pixel electrode in a thickness direction, and is formed of a transparent conductive material. A metal layer, in conjunction with a part of the common electrode, forms a laminated structure, and includes a light-shield part which overlaps the channel layer at least partially in plan view.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: May 19, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinji Kawabuchi, Naruhito Hoka, Kazushi Yamayoshi, Akihiko Hosono, Kenichi Miyamoto
  • Patent number: 10643564
    Abstract: A liquid crystal display includes scanning lines and signal lines arranged in a matrix pattern on a TFT substrate, a pixel being formed at a crossing portion of each scanning line and each signal line, and including a TFT that is connected to each scanning line and each signal line, first nonlinear resistance elements formed respectively in the scanning lines, each of which being connected to one scanning line at one end thereof and to a short ring power-supply line for a scanning line at another end thereof, and second nonlinear resistance elements formed respectively in the signal lines, each of which being connected to one signal line at one end thereof and to a short ring power-supply line for a signal line at another end thereof. A voltage is applied to the first and second nonlinear resistance elements independently of each scanning line and each signal line.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: May 5, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinji Kawabuchi, Manabu Tanahara
  • Publication number: 20190385559
    Abstract: A liquid crystal display includes scanning lines and signal lines arranged in a matrix pattern on a TFT substrate, a pixel being formed at a crossing portion of each scanning line and each signal line, and including a TFT that is connected to each scanning line and each signal line, first nonlinear resistance elements formed respectively in the scanning lines, each of which being connected to one scanning line at one end thereof and to a short ring power-supply line for a scanning line at another end thereof, and second nonlinear resistance elements formed respectively in the signal lines, each of which being connected to one signal line at one end thereof and to a short ring power-supply line for a signal line at another end thereof. A voltage is applied to the first and second nonlinear resistance elements independently of each scanning line and each signal line.
    Type: Application
    Filed: August 30, 2019
    Publication date: December 19, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinji KAWABUCHI, Manabu TANAHARA
  • Patent number: 10502968
    Abstract: An image display apparatus includes a parallax-barrier shutter panel including a plurality of sub-pixels arranged widthwise, the sub-pixels each being changeable between a light transmittance state and a light block state by driving a liquid crystal layer held between a first transparent substrate and a second transparent substrate with a first transparent electrode extending lengthwise. The first transparent substrate includes in a display area, a lower-layer first transparent electrode disposed under an interlayer insulating film and an upper-layer first transparent electrode disposed on the interlayer insulating film, the lower-layer first transparent electrode and the upper-layer first transparent electrode being the first transparent electrode. The first transparent substrate includes in an area adjacent to the display area, a lower-layer metal wire disposed under the interlayer insulating film and an upper-layer metal wire disposed on the interlayer insulating film.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: December 10, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinji Kawabuchi, Osamu Miyakawa
  • Patent number: 10482837
    Abstract: A liquid crystal display includes scanning lines and signal lines arranged in a matrix pattern on a TFT substrate, a pixel being formed at a crossing portion of each scanning line and each signal line, and including a TFT that is connected to each scanning line and each signal line, first nonlinear resistance elements formed respectively in the scanning lines, each of which being connected to one scanning line at one end thereof and to a short ring power-supply line for a scanning line at another end thereof, and second nonlinear resistance elements formed respectively in the signal lines, each of which being connected to one signal line at one end thereof and to a short ring power-supply line for a signal line at another end thereof. A voltage is applied to the first and second nonlinear resistance elements independently of each scanning line and each signal line.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: November 19, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinji Kawabuchi, Manabu Tanahara
  • Publication number: 20190251921
    Abstract: A shift register circuit that controls back gate voltage of a transistor with a simple configuration and at a low cost, and a display panel. In the shift register circuit, shift registers include: an output circuit, a charge and discharge circuit, a first power supply terminal, and at least one back gate voltage generation circuit. The output circuit or the charge and discharge circuit includes at least one transistor. The back gate voltage generation circuit includes a back gate node. The back gate node is connected to the back gate electrode of the transistor. The back gate voltage generation circuit changes a voltage of the back gate node according to a voltage of a gate electrode of the transistor. The back gate voltage generation circuit is supplied with a drive voltage from the first power supply terminal.
    Type: Application
    Filed: May 25, 2017
    Publication date: August 15, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takeshi ONO, Masafumi AGARI, Toshiaki FUJINO, Shinji KAWABUCHI
  • Publication number: 20180373054
    Abstract: An image display apparatus includes a parallax-barrier shutter panel including a plurality of sub-pixels arranged widthwise, the sub-pixels each being changeable between a light transmittance state and a light block state by driving a liquid crystal layer held between a first transparent substrate and a second transparent substrate with a first transparent electrode extending lengthwise. The first transparent substrate includes in a display area, a lower-layer first transparent electrode disposed under an interlayer insulating film and an upper-layer first transparent electrode disposed on the interlayer insulating film, the lower-layer first transparent electrode and the upper-layer first transparent electrode being the first transparent electrode. The first transparent substrate includes in an area adjacent to the display area, a lower-layer metal wire disposed under the interlayer insulating film and an upper-layer metal wire disposed on the interlayer insulating film.
    Type: Application
    Filed: June 7, 2018
    Publication date: December 27, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinji KAWABUCHI, Osamu MIYAKAWA
  • Publication number: 20180158427
    Abstract: A liquid crystal display includes scanning lines and signal lines arranged in a matrix pattern on a TFT substrate, a pixel being formed at a crossing portion of each scanning line and each signal line, and including a TFT that is connected to each scanning line and each signal line, first nonlinear resistance elements formed respectively in the scanning lines, each of which being connected to one scanning line at one end thereof and to a short ring power-supply line for a scanning line at another end thereof, and second nonlinear resistance elements formed respectively in the signal lines, each of which being connected to one signal line at one end thereof and to a short ring power-supply line for a signal line at another end thereof. A voltage is applied to the first and second nonlinear resistance elements independently of each scanning line and each signal line.
    Type: Application
    Filed: December 1, 2017
    Publication date: June 7, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinji KAWABUCHI, Manabu TANAHARA
  • Publication number: 20170329176
    Abstract: A channel layer is formed of an oxide semiconductor. A first insulating film is provided on the channel layer, a source line, and a drain electrode, and includes a drain contact hole which reaches the drain electrode. A pixel electrode is provided on the first insulating film, includes a connection conductive layer which is connected to the drain electrode by the drain contact hole, and is formed of a transparent conductive material. The pixel electrode is covered with a second insulating film. A common electrode is provided on the second insulating film, includes an opening which faces the pixel electrode in a thickness direction, and is formed of a transparent conductive material. A metal layer, in conjunction with a part of the common electrode, forms a laminated structure, and includes a light-shield part which overlaps the channel layer at least partially in plan view.
    Type: Application
    Filed: May 8, 2017
    Publication date: November 16, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinji KAWABUCHI, Naruhito HOKA, Kazushi YAMAYOSHI, Akihiko HOSONO, Kenichi MIYAMOTO
  • Publication number: 20070097282
    Abstract: A thin film multilayer substrate includes a planarizing film having bumpy pattern on its surface, a plurality of first conductive parts below the planarizing film, and a second conductive parts above the planarizing film. The bumpy pattern on the surface of the planarizing film is formed in regions where salient parts of the first conductive parts are formed excluding regions the second conductive parts formed therein.
    Type: Application
    Filed: September 28, 2006
    Publication date: May 3, 2007
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takafumi Hashiguchi, Shinji Kawabuchi
  • Publication number: 20060262056
    Abstract: The present invention provides a display device capable of reducing cost by reduction in number of integrators. Signal lines (91 to 94, 95 to 98, 99 to 912, 913 to 916) are brought together into one line by means of signal lines (10a, 10b, 10c, 10d) to be connected to integrators (4a, 4b, 4c, 4d), respectively. Selector lines (71 to 74) orthogonal to the signal lines (91 to 916) are formed and connected to a selector driving circuit (3). An a-SiTFT (12) is formed at each of intersections: an intersection of the selector line (71) and the signal lines (91, 95, 99, 913); an intersection of the selector line (72) and the signal lines (92, 96, 910, 914); an intersection of the selector line (73) and the signal lines (93, 97, 911, 915); and an intersection of the selector line (74) and the signal lines (94, 98, 912, 916). The selector lines (71 to 74) are driven in sequence by the selector driving circuit (3) in the frame period.
    Type: Application
    Filed: April 12, 2006
    Publication date: November 23, 2006
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Yuichi MASUTANI, Naoki Nakagawa, Shinji Kawabuchi, Shigeru Yachi, Kazunori Okumoto, Yukio Ijima, Takayuki Fukuda
  • Patent number: 5763987
    Abstract: An electron source includes a cathode electrode having an emitter of conical shape. A first insulating film surrounds the emitter. A first extracting electrode disposed on the first insulating film draws out electrons from the emitter. A second insulating film is disposed on the extracting electrode and a focusing electrode is disposed on the second insulating film for focusing the electrons. The films and electrodes are hollowed to constitute a well surrounding the emitter, and the electrodes are applied predetermined voltages respectively to control the electrons emitted from the emitter. A disturbance that the voltage applied to the focusing electrode causes to the electric field around a summit of the emitter is suppressed. The electrode source may be made by determining a thickness of a masking material so that, when forming the conical emitter, an area occupied by the films deposited on the masking material in the well is smaller than the well when all the films have been completed.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: June 9, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazutoshi Morikawa, Shinsuke Yura, Shinji Kawabuchi