Abstract: A peak voltage detector circuit detects a peak voltage of an input voltage. The input voltage is input into a first input terminal of a comparator. A counter circuit counts up a counter value in synchronization with a first clock signal, when a signal output from the comparator is in a first state. The counter circuit counts down the counter value in synchronization with a second clock signal. A digital-analog conversion circuit outputs an output voltage corresponding to the counter value, and the output voltage is input into a second input terminal of the comparator. The first clock signal has a wave period shorter than that of the second clock signal.

Abstract: The present invention reliably removes a signal change associated with a noise component from a comparison signal of a comparator. A comparator circuit includes a comparator and a timer circuit. After a reversal of the comparison signal, if the level of the comparator is sustained at least from a first time to a second time, an output signal is reversed and output. The timer circuit includes a memory unit that is shifted to a memory state in which the reversal of the comparison signal is stored at the first time if the reversal is verified. If the comparison signal is reversed during the interval between the first time and second time, the memory state is cleared.

Abstract: A peak voltage detector circuit detects a peak voltage of an input voltage. The input voltage is input into a first input terminal of a comparator. A counter circuit counts up a counter value in synchronization with a first clock signal, when a signal output from the comparator is in a first state. The counter circuit counts down the counter value in synchronization with a second clock signal. A digital-analog conversion circuit outputs an output voltage corresponding to the counter value, and the output voltage is input into a second input terminal of the comparator. The first clock signal has a wave period shorter than that of the second clock signal.

Abstract: A binarization circuit for binarizing a pulsative analog signal includes: a first comparator circuit for reversing an output signal when the analog signal becomes smaller than a threshold voltage and when the analog signal becomes larger than a high side threshold voltage; a second comparator circuit for reversing an output signal when the analog signal becomes larger than the threshold voltage and when the analog signal becomes smaller than a low side threshold voltage; and a selector circuit for inputting the output signals from the first and second comparator circuits and for reversing an output signal when the analog signal becomes smaller than the threshold voltage and when the analog signal becomes larger than the threshold voltage.

Abstract: In a position detecting device for a moving object, such as a camshaft gear, having ridges and valleys, magnetoresistive elements are disposed in positions offset in the rotation direction of the moving object from the magnetic center of a bias magnetic field projected by a bias magnet. The direction of the bias magnetic field is different when the moving object is in a ridge position from when it is in a valley position. A mid-point potential of the MREs is taken as the output of an MRE bridge to obtain an output value which is different when the moving object is in the ridge position from when it is in the valley position. It is thus possible to distinguish between the ridge position and the valley position of the moving object.

Abstract: A watch-dog type monitoring circuit for a communication device has a counter and a timer. The communication device outputs a communication signal including plural groups of pulse-string signals. The maximum number of pulses in each group of pulse-string signals and the minimum idle time between successive groups of pulse-string signals are previously prescribed by a communications protocol. The counter counts pulses and outputs an abnormal condition signal when a counted number exceeds a predetermined number. The timer inputs the communication signal, measures the idle time between successive groups of pulse-string signals, and resets the counter when the measured idle time exceeds a predetermined amount of time.