Patents by Inventor Shinji NISHIZONO
Shinji NISHIZONO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10917962Abstract: The reliability of an electronic device is improved. An electronic device has a wiring substrate and a housing made of a metal for supporting the wiring substrate. A semiconductor device having a switching power transistor is mounted at the wiring substrate. A ground pattern of a conductive film and a heat radiation pattern of a conductive film are formed at the wiring substrate. The heat radiation pattern is not electrically coupled with any electronic component mounted at the wiring substrate, and is also not electrically coupled with the ground pattern. The ground pattern overlaps the semiconductor device in the thickness direction of the wiring substrate. The heat radiation pattern overlaps the ground pattern in the thickness direction of the wiring substrate, and overlaps a region where the housing and the wiring substrate are in contact with each other.Type: GrantFiled: July 9, 2018Date of Patent: February 9, 2021Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Norikazu Motohashi, Shinji Nishizono
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Patent number: 10566879Abstract: A first semiconductor device having a power transistor for switching is mounted on a power wiring substrate PB1; a semiconductor device PKG6 having a driving circuit for driving the first semiconductor device and a semiconductor device PKG5 having a control circuit for controlling the semiconductor device PKG6 are mounted on a first principal surface of a control wiring substrate PB2; and a semiconductor device PKG4 having a regulator circuit is mounted on a second principal surface of the control wiring substrate PB2. On the first principal surface of the control wiring substrate PB2, the semiconductor device PKG5 and the semiconductor device PKG6 are mounted in a second area out of the second area and a third area adjacent to each other via a first area in which a plurality of holes HC3 are arranged.Type: GrantFiled: September 14, 2015Date of Patent: February 18, 2020Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Shinji Nishizono, Tadashi Shimizu, Tomohiro Nishiyama, Norikazu Motohashi
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Patent number: 10375817Abstract: An electronic device has a control board having a plurality of wiring layers, a metal-made housing supporting the control board, and a fixing screw for fixing the control board to the housing through a washer. The control board includes a through hole penetrating from a third surface to a fourth surface, a through electrode formed inside the through hole, and a power system GND pattern formed on any wiring layer of the wiring layers. The power system GND pattern and the housing are electrically coupled through the through electrode, the washer, and the fixing screw.Type: GrantFiled: April 6, 2017Date of Patent: August 6, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Norikazu Motohashi, Tomohiro Nishiyama, Tadashi Shimizu, Shinji Nishizono
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Patent number: 10361609Abstract: An electronic device is downsized while suppressing performance degradation of the electronic device. In the electronic device, a power module including a power transistor is arranged in a first region on a back surface of a through hole board having a plurality of through hole vias having different sizes while a pre-driver including a control circuit is arranged in a second region on a front surface of the board. In this case, in a plan view, the first region and the second region have an overlapping region. The power module and the pre-driver are electrically connected to each other via a through hole via. The plurality of through hole vias include a through hole via having a first size, a through hole via which is larger than the first size and in which a cable can be inserted, and a through hole via in which a conductive member is embedded.Type: GrantFiled: June 21, 2017Date of Patent: July 23, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Shinji Nishizono, Tadashi Shimizu, Norikazu Motohashi, Tomohiro Nishiyama
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Patent number: 10314169Abstract: A plurality of semiconductor devices each including a semiconductor chip having a high-side MOSFET and a semiconductor chip having a low-side MOSFET are mounted on a wiring board (PB1). The wiring board (PB1) includes a power supply wiring WV1 to which a power supply potential is supplied and output wirings WD1, WD2, and WD3 electrically connecting a low-side drain terminal of each of the plurality of semiconductor devices to a plurality of output terminals. A minimum value and a maximum value of a current path width in the power supply wiring WV1 are referred to as a first minimum width and a first maximum width, respectively, and a minimum value and a maximum value of a current path width in the output wirings WD1, WD2, and WD3 are referred to as a second minimum width and a second maximum width, respectively.Type: GrantFiled: August 21, 2015Date of Patent: June 4, 2019Assignee: Renesas Electronics CorporationInventors: Norikazu Motohashi, Tomohiro Nishiyama, Tadashi Shimizu, Shinji Nishizono
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Publication number: 20190053368Abstract: The reliability of an electronic device is improved. An electronic device has a wiring substrate and a housing made of a metal for supporting the wiring substrate. A semiconductor device having a switching power transistor is mounted at the wiring substrate. A ground pattern of a conductive film and a heat radiation pattern of a conductive film are formed at the wiring substrate. The heat radiation pattern is not electrically coupled with any electronic component mounted at the wiring substrate, and is also not electrically coupled with the ground pattern. The ground pattern overlaps the semiconductor device in the thickness direction of the wiring substrate. The heat radiation pattern overlaps the ground pattern in the thickness direction of the wiring substrate, and overlaps a region where the housing and the wiring substrate are in contact with each other.Type: ApplicationFiled: July 9, 2018Publication date: February 14, 2019Inventors: Norikazu MOTOHASHI, Shinji NISHIZONO
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Publication number: 20180368262Abstract: A plurality of semiconductor devices each including a semiconductor chip having a high-side MOSFET and a semiconductor chip having a low-side MOSFET are mounted on a wiring board (PB1). The wiring board (PB1) includes a power supply wiring WV1 to which a power supply potential is supplied and output wirings WD1, WD2, and WD3 electrically connecting a low-side drain terminal of each of the plurality of semiconductor devices to a plurality of output terminals. A minimum value and a maximum value of a current path width in the power supply wiring WV1 are referred to as a first minimum width and a first maximum width, respectively, and a minimum value and a maximum value of a current path width in the output wirings WD1, WD2, and WD3 are referred to as a second minimum width and a second maximum width, respectively.Type: ApplicationFiled: August 21, 2015Publication date: December 20, 2018Applicant: Renesas Electronics CorporationInventors: Norikazu MOTOHASHI, Tomohiro NISHIYAMA, Tadashi SHIMIZU, Shinji NISHIZONO
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Publication number: 20180367012Abstract: A first semiconductor device having a power transistor for switching is mounted on a power wiring substrate PB1; a semiconductor device PKG6 having a driving circuit for driving the first semiconductor device and a semiconductor device PKG5 having a control circuit for controlling the semiconductor device PKG6 are mounted on a first principal surface of a control wiring substrate PB2; and a semiconductor device PKG4 having a regulator circuit is mounted on a second principal surface of the control wiring substrate PB2. On the first principal surface of the control wiring substrate PB2, the semiconductor device PKG5 and the semiconductor device PKG6 are mounted in a second area out of the second area and a third area adjacent to each other via a first area in which a plurality of holes HC3 are arranged.Type: ApplicationFiled: September 14, 2015Publication date: December 20, 2018Applicant: Renesas Electronics CorporationInventors: Shinji NISHIZONO, Tadashi SHIMIZU, Tomohiro NISHIYAMA, Norikazu MOTOHASHI
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Publication number: 20170373567Abstract: An electronic device is downsized while suppressing performance degradation of the electronic device. In the electronic device, a power module including a power transistor is arranged in a first region on a back surface of a through hole board having a plurality of through hole vias having different sizes while a pre-driver including a control circuit is arranged in a second region on a front surface of the board. In this case, in a plan view, the first region and the second region have an overlapping region. The power module and the pre-driver are electrically connected to each other via a through hole via. The plurality of through hole vias include a through hole via having a first size, a through hole via which is larger than the first size and in which a cable can be inserted, and a through hole via in which a conductive member is embedded.Type: ApplicationFiled: June 21, 2017Publication date: December 28, 2017Inventors: Shinji NISHIZONO, Tadashi SHIMIZU, Norikazu MOTOHASHI, Tomohiro Nishiyama
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Publication number: 20170303389Abstract: An electronic device has a control board having a plurality of wiring layers, a metal-made housing supporting the control board, and a fixing screw for fixing the control board to the housing through a washer. The control board includes a through hole penetrating from a third surface to a fourth surface, a through electrode formed inside the through hole, and a power system GND pattern formed on any wiring layer of the wiring layers. The power system GND pattern and the housing are electrically coupled through the through electrode, the washer, and the fixing screw.Type: ApplicationFiled: April 6, 2017Publication date: October 19, 2017Inventors: Norikazu MOTOHASHI, Tomohiro NISHIYAMA, Tadashi SHIMIZU, Shinji NISHIZONO
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Patent number: 9705363Abstract: In a communication control device in which an antenna electrode having an antenna connected thereto, a power supply circuit, and a communication circuit are mounted on a mounting board, the antenna electrode is disposed at one corner portion on a principal surface of the mounting board, the communication circuit is disposed on a side of a first side of the principal surface that shares the corner portion, and the power supply circuit is disposed on a side of a second side facing the first side. Further, a first signal path connecting the antenna electrode and the communication circuit extends along the first side, and a second signal path connecting the antenna electrode and the power supply circuit extends along a third side that shares the corner portion and is perpendicular to the first side.Type: GrantFiled: June 14, 2013Date of Patent: July 11, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hiroki Shibuya, Hideki Sasaki, Tatsuaki Tsukuda, Tadashi Shimizu, Masahiro Dobashi, Shinji Nishizono, Hiroko Kubota
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Publication number: 20160156231Abstract: In a communication control device in which an antenna electrode having an antenna connected thereto, a power supply circuit, and a communication circuit are mounted on a mounting board, the antenna electrode is disposed at one corner portion on a principal surface of the mounting board, the communication circuit is disposed on a side of a first side of the principal surface that shares the corner portion, and the power supply circuit is disposed on a side of a second side facing the first side. Further, a first signal path connecting the antenna electrode and the communication circuit extends along the first side, and a second signal path connecting the antenna electrode and the power supply circuit extends along a third side that shares the corner portion and is perpendicular to the first side.Type: ApplicationFiled: June 14, 2013Publication date: June 2, 2016Inventors: Hiroki SHIBUYA, Hideki SASAKI, Tatsuaki TSUKUDA, Tadashi SHIMIZU, Masahiro DOBASHI, Shinji NISHIZONO, Hiroko KUBOTA