Abstract: A solid-state imaging device capable of reducing an area of a chip, capable of realizing both reduction of voltage and prevention of inversion video noise and consequently capable of realizing a higher image quality having a pixel portion and a clipping circuit capable of clipping a pixel readout voltage in accordance with a clipping voltage, wherein the pixel includes a photo-electric conversion element PD, a transfer element capable of transferring a charge accumulated in the photo-electric conversion element in a transfer period, a floating diffusion FD to which the charge accumulated in the photo-electric conversion element is transferred through a transfer element, a source-follower element which converts the charge in the floating diffusion to a voltage signal in accordance with a charge quantity, and a reset element which resets the floating diffusion to a predetermined potential in a resetting period, and the clipping circuit is arranged in an ineffective region of the pixel portion, a driving method

Abstract: A solid-state imaging device capable of reducing an area of a chip, capable of realizing both reduction of voltage and prevention of inversion video noise and consequently capable of realizing a higher image quality having a pixel portion and a clipping circuit capable of clipping a pixel readout voltage in accordance with a clipping voltage, wherein the pixel includes a photo-electric conversion element PD, a transfer element capable of transferring a charge accumulated in the photo-electric conversion element in a transfer period, a floating diffusion FD to which the charge accumulated in the photo-electric conversion element is transferred through a transfer element, a source-follower element which converts the charge in the floating diffusion to a voltage signal in accordance with a charge quantity, and a reset element which resets the floating diffusion to a predetermined potential in a resetting period, and the clipping circuit is arranged in an ineffective region of the pixel portion, a driving method

Abstract: A method of manufacturing a hydrogen separation membrane with a carrier is characterized by including a first step of providing, between the hydrogen separation membrane and the carrier that supports the hydrogen separation membrane, a low-hardness metal membrane having a hardness that is lower than the hardness of the hydrogen separation membrane, and a second step of joining the hydrogen separation membrane, the low-hardness metal membrane, and the carrier by a cold joining method. In this case, it is possible to suppress the deformation of the hydrogen separation membrane, the low-hardness metal membrane, and the carrier and, as a result, it is possible to prevent damaging of the hydrogen separation membrane. The adhesion of the contact between the hydrogen separation membrane and the carrier is also improved. The result is that it is not necessary to increase the severity of the cold joining conditions.

Abstract: Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.

Abstract: A printed wiring board and a method for manufacturing the printed wiring board in which widths of a first and a second circuit are close to each other and substantial miniaturization can be achieved. In order to achieve this object, a first circuit and a second circuit having different thicknesses are formed in the same reference plane by etching a metal-clad laminate including a conductive layer and an insulating layer. The thicker of the circuits has a clad-like configuration in which three layers, a first copper layer/a different kind of metal layer/a second copper layer, are sequentially stacked. The manufacture of the printed wiring board includes a clad composite material in which three layers of a first copper layer/a different kind of metal layer/a second copper layer are sequentially stacked as a start material, and selective etching characteristics between the layers are utilized.

Abstract: Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.

Abstract: A solid-state image sensing device includes a pixel unit, analog-to-digital converter, controller, and adder. In the pixel unit, cells are two-dimensionally arranged on a semiconductor substrate. An output analog signal from the pixel unit is converted into a digital signal by the analog-to-digital converter and output. The controller controls the pixel unit and analog-to-digital converter, and causes the analog-to-digital converter to digitize a plurality of analog signals different in storage time in the pixel unit during the storage period of the electric charge of one frame. The adder adds digital signals corresponding to the analog signals different in storage time and output from the analog-to-digital converter.

Abstract: Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.

Abstract: Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.

Abstract: Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.

Abstract: A method of manufacturing a hydrogen separation membrane with a carrier is characterized by including a first step of providing, between the hydrogen separation membrane and the carrier that supports the hydrogen separation membrane, a low-hardness metal membrane having a hardness that is lower than the hardness of the hydrogen separation membrane, and a second step of joining the hydrogen separation membrane, the low-hardness metal membrane, and the carrier by a cold joining method. In this case, it is possible to suppress the deformation of the hydrogen separation membrane, the low-hardness metal membrane, and the carrier and, as a result, it is possible to prevent damaging of the hydrogen separation membrane. The adhesion of the contact between the hydrogen separation membrane and the carrier is also improved. The result is that it is not necessary to increase the severity of the cold joining conditions.

Abstract: An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column.

Abstract: A solid-state image sensor which includes a pixel section, AD converter, line memory, controller and synthesizer is disclosed. The line memory stores a digital signal output from the AD converter. The controller controls the pixel section and AD converter to subject analog signals of different exposure times to an AD converting process by use of the AD converter and transfer the thus AD-converted signals to the line memory in an accumulation period of charges of one frame. The synthesizer is supplied with digital signals of different exposure times from the line memory, compare a fist signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by the ratio of the signal of short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.

Abstract: To provide a printed wiring board and a method for manufacturing the printed wiring board in which circuit widths of a signal transmission circuit and a power supply circuit or the like, which conventionally require to have greatly different circuit widths, are close to each other as much as possible and substantial miniaturization can be achieved. In order to achieve this object, a printed wiring board obtained by etching a metal-clad laminate including a conductive layer and an insulating layer is employed, in which a first circuit and a second circuit having different thicknesses formed in a same reference plane coexist. In addition, it is characterized in that a thicker circuit of the first circuit or the second circuit has a clad-like configuration in which three layers of a first copper layer/a different kind of metal layer/a second copper layer are sequentially stacked.

Abstract: An MOS-type solid-state imaging apparatus includes an imaging region formed by two-dimensionally arranging unit cells serving as photoelectric conversion portions on a semiconductor substrate, a plurality of vertical address lines arranged in a row direction of the imaging region to select a row of unit cells to be addressed, a plurality of vertical signal lines arranged in a column direction of the imaging region to read out signals from the unit cells in each column, a plurality of load transistors each connected to one end of each of the vertical signal lines, and a plurality of horizontal selection transistors each connected to the other end of each of the vertical signal lines.

Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.

Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.

Abstract: A multilayer printed wiring board having a wiring lead-out port has a signal circuit conductor perfectly covered by an earth circuit in its inside and a wiring lead-out port. A signal circuit conductor having a branch pattern is preferable. A large number of products can be easily manufactured with good size reproducibility. The multilayer printed wiring board is manufactured by selectively etching the copper of a cladding sheet manufactured by bonding a copper foil to a nickel foil with 0.1-3% reduction and forming a signal circuit conductor covered by an earth circuit and the wiring lead-out port.

Abstract: Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.

Abstract: A solid-state image sensor which includes a pixel section, AD converter, line memory, controller and synthesizer is disclosed. The line memory stores a digital signal output from the AD converter. The controller controls the pixel section and AD converter to subject analog signals of different exposure times to an AD converting process by use of the AD converter and transfer the thus AD-converted signals to the line memory in an accumulation period of charges of one frame. The synthesizer is supplied with digital signals of different exposure times from the line memory, compare a fist signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by the ratio of the signal of short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.