Abstract: There is disclosed a semiconductor device, comprising: a semiconductor chip having a plurality of electrode pads on the upper surface; a terminal formed on the upper surface of the semiconductor chip, and electrically connected to each of the electrode pads; a resin formed on the upper surface of the semiconductor chip, encapsulating the terminal to be exposed to the extent of a predetermined height; and an electroconductor connected to the terminal. There is also disclosed a method of fabricating such a semiconductor device.

Abstract: A semiconductor device having resin formed on both surfaces of semiconductor elements, where a resin thickness ratio for the resin formed on the two surfaces at least 0.2 and not more than 1.

Abstract: A polyimide layer is formed over a semiconductor chip, a rewiring to be connected to each of the electrode pads of the semiconductor chip is formed over the polyimide layer, and a post serving as a terminal is connected to each of the electrode pads via the rewiring, thereby redisposing the electrode pads. A resin for encapsulating the rewirings and the posts is formed on the surface of the semiconductor chip to the extent equivalent to the dimension of the semiconductor chip, and in a groove formed in portions of the resin, around the respective posts, the topmost surface and the sidewall face of the respective posts are exposed out of the resin.

Abstract: A resin-sealed semiconductor device according to this invention is an LOC type semiconductor device comprising a semiconductor chip having a circuit surface on which an electrode is formed; a lead which is arranged in such a manner that the distal end of the lead overlaps the semiconductor chip, and which is electrically connected to each electrode; a lead fixing resin layer interposed between the semiconductor chip and the lead to fix them; and a sealing resin layer coated to cover the semiconductor chip and the lead. The diameter of filler contained in the lead fixing resin layer is about 1/10 to 1/5 the diameter of filler contained in the sealing resin layer, and is about 1/10 a gap between the lead and the semiconductor chip.

Abstract: A semiconductor device in accordance with the present invention reduces cracks occurring in a junction between a semiconductor device and a mounting substrate due to a heat stress when the semiconductor device is mounted on a printed circuit board or the like. The semiconductor device has a semiconductor element having a thickness of 200 &mgr;m or less, an electrode pad formed on the semiconductor element, a post electrically connected to the electrode pad, and a sealing resin for sealing a surface where circuitry is formed and the post.

Abstract: A polyimide layer is formed over a semiconductor chip, a rewiring to be connected to each of the electrode pads of the semiconductor chip is formed over the polyimide layer, and a post serving as a terminal is connected to each of the electrode pads via the rewiring, thereby redisposing the electrode pads. A resin for encapsulating the rewirings and the posts is formed on the surface of the semiconductor chip to the extent equivalent to the dimension of the semiconductor chip, and in a groove formed in portions of the resin, around the respective posts, the topmost surface and the sidewall face of the respective posts are exposed out of the resin.

Abstract: There is disclosed a semiconductor device, comprising: a semiconductor chip having a plurality of electrode pads on the upper surface; a terminal formed on the upper surface of the semiconductor chip, and electrically connected to each of the electrode pads; a resin formed on the upper surface of the semiconductor chip, encapsulating the terminal to be exposed to the extent of a predetermined height; and an electroconductor connected to the terminal. There is also disclosed a method of fabricating such a semiconductor device.

Abstract: A semiconductor device in accordance with the present invention reduces cracks occurring in a junction between a semiconductor device and a mounting substrate due to a heat stress when the semiconductor device is mounted on a printed circuit board or the like. The semiconductor device has a semiconductor element having a thickness of 200 &mgr;m or less, an electrode pad formed on the semiconductor element, a post electrically connected to the electrode pad, and a sealing resin for sealing a surface where circuitry is formed and the post.

Abstract: A resin sealing type semiconductor device, a manufacturing method thereof and a packaging structure thereof are capable of downsizing the semiconductor device and attaining high-density packaging. For this, the resin sealing type semiconductor device with leads exposed in an outer surface, is provided with spot leads adhered to a circuit forming surface of a semiconductor element with an insulating adhesive tape interposed therebetween, each independently regularly arrayed, and exposed to outside with the semiconductor element disposed inside.

Abstract: A semiconductor apparatus includes a semiconductor device to be mounted on a circuit board; a plurality of conductive posts electrically connected to the semiconductor device; and a plurality of conductive bumps each provided on an outer end of each of the conductive posts, so that the plurality of conductive bump is soldered onto the circuit board when the semiconductor device is mounted on the circuit board. A distance between a peripheral edge of the semiconductor device and an outer edge of the conductive post is determined to be narrow so that a solderbility or wetting condition of the conductive bumps can be visibly recognized easily.

Abstract: A semiconductor device having resin formed on both surfaces of semiconductor elements, where a resin thickness ratio for the resin formed on the two surfaces at least 0.2 and not more than 1.

Abstract: A semiconductor device capable mounting semiconductor elements having different functions without increasing the area of the semiconductor device, and its manufacturing method are presented. A part of wiring 104 is formed al so at the side surface of a semiconductor element 101, and bump electrodes 102 formed so as to be nearly on a same plane as the wiring 104 formed at the side surface of the semiconductor element 101, at least a part of ball electrodes 103 is formed so as to connect electrically to the wiring 104 at the side surface of the semiconductor element, the side surface of the semiconductor element is sealed with resin exposing the wiring 104, and the confronting surface of the circuit forming surface is sealed with resin.

Abstract: A semiconductor device comprises a base semiconductor substrate (201) having an edge area (120) which surrounds an element forming area (110), a buried oxide film (202) provided over the base semiconductor substrate (201) in the element forming area (110), an element forming semiconductor substrate (203) provided over the buried oxide film (202).

Abstract: A semiconductor device having resin formed on both surfaces of semiconductor elements, where a resin thickness ratio for the resin formed on the two surfaces at least 0.2 and not more than 1.

Abstract: A resin-sealed semiconductor device according to this invention is an LOC type semiconductor device comprising a semiconductor chip having a circuit surface on which an electrode is formed; a lead which is arranged in such a manner that the distal end of the lead overlaps the semiconductor chip, and which is electrically connected to each electrode; a lead fixing resin layer interposed between the semiconductor chip and the lead to fix them; and a sealing resin layer coated to cover the semiconductor chip and the lead. The diameter of filler contained in the lead fixing resin layer is about {fraction (1/10)} to ⅕ the diameter of filler contained in the sealing resin layer, and is about {fraction (1/10)} a gap between the lead and the semiconductor chip.

Abstract: Protective tape 22 is bonded onto the rear surface of a semiconductor element 1 prior to the resin sealing step, and then only the primary surface of the semiconductor element 1 is sealed with a resin layer 5 so that cracks and warping which would otherwise be caused by an external force or foreign matter at the rear surface of the semiconductor element was exposed, are prevented to facilitate the surface polishing step and also so that a lower profile is achieved for the semiconductor device by not sealing the rear surface with resin.

Abstract: A resin-sealed LOC type semiconductor device includes semiconductor chip having a circuit surface on which electrodes are formed. Leads are arranged with their distal ends overlapping the semiconductor chip, electrically connected to the respective electrodes. A lead fixing resin layer is interposed between the semiconductor chip and the leads to fix them. A sealing resin layer coats the semiconductor chip and the lead to over them. The diameter of filler contained in the lead fixing resin layer is about {fraction (1/10)} to ⅕ the diameter of filler contained in the sealing resin layer, and is about {fraction (1/10)} the width of a gap between each lead and the semi conductor chip.

Abstract: Protective tape is bonded onto a rear surface of a semiconductor element prior to a resin sealing step, and then only a primary surface of the semiconductor element is sealed with a resin layer. Cracks and warping which would otherwise be caused by an external force or foreign matter at an exposed rear surface of the semiconductor element are prevented. This facilitates a surface polishing step and also results in a lower profile for the semiconductor device, because the rear surface is not sealed with resin.

Abstract: In a plastic packaged semiconductor device, a chip support formed on the same lead frame as leads is disposed so as to extend over the surface of a semiconductor element, the chip support is bonded and fixed to the surface of a polyimide wafer coat on the semiconductor element by means of an insulating tape, the leads are brought into contact with the polyimide wafer coat on the semiconductor element without being fixed, the leads and the electrodes of the semiconductor element are connected by means of gold wires, and these are packaged by a packaging material. Generation of crack in the sealing material thereby prevented, and the thickness of the plastic packaged semiconductor device is reduced.

Abstract: A metal pattern 4 is formed at a rear surface of a substrate 3 at a front surface of which a molded semiconductor chip is mounted, the metal pattern 4 is covered with an insulating film 5 except at its connecting area 4a and a solder ball 6 is bonded to the connecting area 4a. The area of the metal pattern 4 other than the connecting area 4a inclines toward the substrate 3 and gradually becomes thinner toward the outside. Stress, which is applied to the solder ball 6, is imparted in a diagonal direction and is dispersed. As a result, the number of occurrences of cracks X is reduced and the solder ball which is used to achieve connection with an external substrate is effectively prevented from becoming electrically disconnected.