Abstract: An extracellular potential measurement device includes multiple insulating films each of which is made from an electric insulating material, the insulating films being stacked and bonded to each other; and multiple electrode wires each of which is made from an electroconductive material, the electrode wires being arranged in multiple heights. Each of the electrode wires is interposed between an upper insulating film and a lower insulating film. Each of the insulating films, except for a lowermost insulating film, has an opening penetrating the insulating film. The opening in a lower insulating film has a size that is less than that of the opening in an upper insulating film, the openings in the insulating films being overlapped to form a recess having a size reducing downward, the recess being adapted to store a collection of cells. Each of the electrode wires has an end that is located near an opening in an insulating film that is immediately below the electrode wire, the ends being exposed in the recess.

Abstract: An extracellular potential measurement device includes multiple insulating films each of which is made from an electric insulating material, the insulating films being stacked and bonded to each other; and multiple electrode wires each of which is made from an electroconductive material, the electrode wires being arranged in multiple heights. Each of the electrode wires is interposed between an upper insulating film and a lower insulating film. Each of the insulating films, except for a lowermost insulating film, has an opening penetrating the insulating film. The opening in a lower insulating film has a size that is less than that of the opening in an upper insulating film, the openings in the insulating films being overlapped to form a recess having a size reducing downward, the recess being adapted to store a collection of cells. Each of the electrode wires has an end that is located near an opening in an insulating film that is immediately below the electrode wire, the ends being exposed in the recess.

Abstract: A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.

Abstract: A processing time required for regeneration of a layer transferred wafer is reduced and the regeneration cost is lowered, while a removal amount at the regeneration is decreased the number of regeneration times is increased. A main surface of a semiconductor wafer (13) has a main flat portion (13d) and a chamfered portion (13c) formed in the periphery of the main flat portion (13d), an ion implanted area (13b) is formed by implanting ions only into the main flat portion (13d), a laminated body (16) is formed by laminating the main flat portion (13d) on a main surface of a support wafer (14), and moreover, the semiconductor wafer (13) is separated from a thin layer (17) in the ion implanted area (13b) by heat treatment at a predetermined temperature so as to obtain a thick layer transferred wafer (12), which is to be regenerated.

Abstract: A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.

Abstract: A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.

Abstract: A processing time required for regeneration of a layer transferred wafer is reduced and the regeneration cost is lowered, while a removal amount at the regeneration is decreased the number of regeneration times is increased. A main surface of a semiconductor wafer (13) has a main flat portion (13d) and a chamfered portion (13c) formed in the periphery of the main flat portion (13d), an ion implanted area (13b) is formed by implanting ions only into the main flat portion (13d), a laminated body (16) is formed by laminating the main flat portion (13d) on a main surface of a support wafer (14), and moreover, the semiconductor wafer (13) is separated from a thin layer (17) in the ion implanted area (13b) by heat treatment at a predetermined temperature so as to obtain a thick layer transferred wafer (12), which is to be regenerated.

Abstract: The regeneration cost is reduced when a layer transferred wafer is to be reused two times or more. Ions are implanted into a semiconductor wafer (13) to form an ion implanted area (13b) inside the semiconductor wafer (13), and a first laminated body (16) in which the wafer (13) is laminated on a first support wafer (14) is subjected to heat treatment so as to obtain a thick first layer transferred wafer (12). Then, an ion implanted area (23b) is formed inside the layer transferred wafer (12) by implanting ions into a second main surface (12c) of the first layer transferred wafer (12) on the side opposite to a separated surface (12a), and a second laminated body (26) in which the main surface (12c) of the wafer (12) is laminated onto a second support wafer (24) is subjected to heat treatment so as to obtain a thick second layer transferred wafer (22). And then, both surfaces of the layer transferred wafer (22) are polished to obtain a regenerated wafer (32).

Abstract: There are provided a method for manufacturing a direct bonded SOI wafer in which the entire buried oxide film layer is covered and not exposed and a direct bonded SOI wafer. This is the improvement of a method for manufacturing a direct bonded SOI wafer comprising the process of (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness, wherein in a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer.

Abstract: A sub sensor for measuring a small area is integrally incorporated in a main sensor for measuring a large area and a part in the vicinity of the edge of a wafer is measured by the sub sensor, while a center of a wafer is measured by the main sensor.