Patents by Inventor Shinji Ono

Shinji Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050134487
    Abstract: A code processing circuit includes a plurality of coders which encode different kinds of data, respectively, a first buffer which stores the codes outputted from the coders provided corresponding to the plurality of coders, a second buffer which stores the lengths of the codes outputted from the coders provided corresponding to the plurality of coders, a first adder which adds the code lengths stored in the second buffer provided corresponding to the plurality of coders, a second adder which adds all the code lengths added in the first adder, and an adjustment unit which adjusts an output code by the unit of 1 bit based on the codes stored in the first buffer, the code lengths stored in the second buffer and the code lengths added in the second adder.
    Type: Application
    Filed: December 23, 2003
    Publication date: June 23, 2005
    Inventor: Shinji Ono
  • Patent number: 4429103
    Abstract: An aromatic polyesterpolycarbonate containing a dihydroxy-diaryl compound residue, a terephthalic acid residue and/or isophthalic acid residue, and a carbonate bond in a molar ratio of 1:0.25-0.75:0.75-0.25 is prepared by first mixing and reacting an aqueous alkaline solution of a dihydroxy-diaryl compound, an organic solvent solution of terephthaloyl chloride and/or isophthaloyl chloride, and phosgene to obtain a polyesterpolycarbonate oligomer having --OCOCl groups, --COCl groups and --OH groups as end groups and then subjecting the oligomer to polycondensation with a caustic alkali in the substantial absence of the dihydroxy-diaryl compound.
    Type: Grant
    Filed: March 19, 1982
    Date of Patent: January 31, 1984
    Assignee: Mitsubishi Chemical Industries, Limited
    Inventors: Katsuhisa Kohyama, Katsuyuki Sakata, Shinji Ono
  • Patent number: 3978285
    Abstract: The frame holding time can be materially extended without increasing the counter size by insertion of a delay circuit and an AND gate between the framing detector and hunting means. Hunting operation is performed under control of the logical AND of the detector output and its retarded counterpart. The frame holding time obtained in the present invention corresponds to the sum of the retardation time of the delay circuit and the frame holding time of the conventional device.
    Type: Grant
    Filed: June 12, 1975
    Date of Patent: August 31, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Yoichi Tan, Shinji Ono