Patents by Inventor Shinji Sawane

Shinji Sawane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8300660
    Abstract: A transmitting apparatus includes a detecting unit that detects deviation and balance relative to a specified bit rate of a frame signal input at a constant bit rate; a dividing unit that reads at constant intervals from a buffer storing the frame signal and outputs a signal divided into a plurality of segments having a predetermined data length; and a correcting unit that, based on the deviation and balance detected by the detecting unit, corrects the data length for the division by the dividing unit.
    Type: Grant
    Filed: January 30, 2010
    Date of Patent: October 30, 2012
    Assignee: Fujitsu Limited
    Inventors: Ichiro Yokokura, Hiromichi Makishima, Shinji Sawane
  • Publication number: 20100238954
    Abstract: A transmitting apparatus includes a detecting unit that detects deviation and balance relative to a specified bit rate of a frame signal input at a constant bit rate; a dividing unit that reads at constant intervals from a buffer storing the frame signal and outputs a signal divided into a plurality of segments having a predetermined data length; and a correcting unit that, based on the deviation and balance detected by the detecting unit, corrects the data length for the division by the dividing unit.
    Type: Application
    Filed: January 30, 2010
    Publication date: September 23, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Ichiro YOKOKURA, Hiromichi Makishima, Shinji Sawane
  • Publication number: 20070245176
    Abstract: In a BER monitoring circuit, error cycles of input data are detected by a parity check portion and an error cycle detecting portion, a maximum (average/median) value is detected from among the error cycles by an error cycle memory and an error cycle maximum (average/median) value retrieving portion. The value is converted into a corresponding estimated error rate by a Te-BER conversion table and an alarm is generated by an SF/SD detecting -portion when the estimated error rate exceeds an alarm detecting threshold. Thereafter, the alarm is released when the estimated error rate assumes equal to or less than an alarm releasing threshold. Also, an error-free detecting portion is activated when an alarm is generated and releases the alarm when a time period for which the error cycles stay flat exceeds a cycle corresponding to the alarm releasing threshold.
    Type: Application
    Filed: August 11, 2006
    Publication date: October 18, 2007
    Inventors: Shinji Sawane, Yuji Obana, Hiroyuki Kitajima