Patents by Inventor Shinji Suzuki

Shinji Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11629154
    Abstract: The present invention provides a compound which has an effect of inhibiting amyloid ßproduction, especially an effect of inhibiting BACE1, and which is useful as a therapeutic or prophylactic agent for diseases induced by production, secretion and/or deposition of amyloid ßproteins. A compound of Formula (I) wherein R3 is each independently alkyl optionally substituted with halogen, cyano, alkyloxy, haloalkyloxy or non-aromatic carbocyclyl, or the like; t is integer from 0 to 3; R5 is a hydrogen atom or halogen; R6 is selected from the group consisting of a hydrogen atom, halogen, and substituted or unsubstituted alkyl; ring B is a substituted or unsubstituted pyrazine or the like; or a pharmaceutically acceptable salt thereof.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: April 18, 2023
    Assignee: SHIONOGI & CO., LTD.
    Inventors: Genta Tadano, Shinji Suzuki, Ken-ichi Kusakabe
  • Publication number: 20230064140
    Abstract: A second conductor, third conductor, and fourth conductor sandwiches a first layer together with a first semiconductor. The fourth conductor is positioned farther from the first conductor than the third conductor, which is positioned farther from first conductor than the second conductor. A first circuit is configured to apply a first potential to the first and second conductors, apply a second potential lower than the first potential to the third conductor in parallel with the application of the first potential, and apply a third potential higher than the second potential and lower than the first potential to the fourth conductor in parallel with the application of the first potential.
    Type: Application
    Filed: March 4, 2022
    Publication date: March 2, 2023
    Applicant: Kioxia Corporation
    Inventors: Yasuhiro SHIINO, Masahiko IGA, Shinji SUZUKI
  • Publication number: 20230069683
    Abstract: A method of adjusting operating conditions includes: a substrate; first conductive layers; a first semiconductor layers facing the first conductive layers; a second semiconductor layer connected to the first semiconductor layers; and an electric charge accumulating layer disposed between the first conductive layers and the first semiconductor layers. At a predetermined timing of a program operation, the second conductive layer which is one of the first conductive layers is supplied with a program voltage or a write pass voltage. The method executes: a first operation that supplies the second conductive layer with the write pass voltage and supplies a third conductive layer which is one of the plurality of first conductive layers with the program voltage; and a second operation that supplies the second conductive layer with a verify voltage and supplies the third conductive layer with a voltage.
    Type: Application
    Filed: November 9, 2022
    Publication date: March 2, 2023
    Applicant: Kioxia Corporation
    Inventor: Shinji SUZUKI
  • Publication number: 20230056364
    Abstract: A semiconductor memory device includes a substrate, gate electrodes, a semiconductor layer opposed to gate electrodes, an electric charge accumulating layer disposed between gate electrodes and the semiconductor layer, a conductive layer connected to one end portion of the semiconductor layer, and a control circuit electrically connected to gate electrodes and the conductive layer. Gate electrodes include first gate electrodes, second gate electrodes, and third gate electrode. The control circuit is configured to perform an erase operation. The erase operation includes: at least one-time first operation that applies a first voltage to the conductive layer; a second operation performed after the first operation, the second operation applying a second voltage to the third gate electrode; and at least one-time third operation performed after the second operation, the third operation applying a third voltage same as or larger than the first voltage to the conductive layer.
    Type: Application
    Filed: March 9, 2022
    Publication date: February 23, 2023
    Applicant: KIOXIA CORPORATION
    Inventors: Manabu SAKANIWA, Yasuhiro SHIINO, Kota NISHIKAWA, Yu ISHIYAMA, Shinji SUZUKI
  • Publication number: 20230025307
    Abstract: This disc brake includes a mounting member, a pair of brake pads, a caliper, a cover member, and a locking member. The caliper includes a cylinder part having a cylinder hole in which a piston for moving one of the pair of brake pads is disposed, a bridge part extending across an outer circumferential surface of a disc from the cylinder part, a plurality of claw parts formed on an extended distal end side of the bridge part and disposed to face the cylinder part, and a recessed part provided between the plurality of claw parts, having an opening at a disc radial direction inner end, and formed to face the cylinder hole. The locking member includes a fixing part fixed to the cover member, and a plurality of locking pieces extending from the fixing part in a direction inclined with respect to a movement direction of the piston.
    Type: Application
    Filed: December 10, 2020
    Publication date: January 26, 2023
    Inventors: Khai Piau LIM, Shinji SUZUKI
  • Patent number: 11542157
    Abstract: Provided is a microchip that can achieve a favorable bonding state in the bonding portion between first and second substrates even if the microchip is large in size. A microchip includes a first substrate made of a resin and a second substrate made of a resin, the first substrate and the second substrates being bonded to each other, and a channel surrounded by a bonding portion between the first substrate and the second substrate is formed by a channel forming step formed at least in the first substrate. Further, a noncontact portion is formed to surround the bonding portion, and an angle ?1 formed between a side wall surface of the channel forming step and a bonding surface continuous therewith satisfies ?1>90°.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: January 3, 2023
    Assignee: Ushio Denki Kabushiki Kaisha
    Inventors: Kenichi Hirose, Makoto Yamanaka, Shinji Suzuki, Kenji Hatakeyama
  • Patent number: 11537140
    Abstract: A device includes an external sensor to scan an environment so as to periodically output scan data, a storage to store an environmental map, and a location estimation device to match the sensor data against the environmental map read from the storage so as to estimate a location and an attitude of the vehicle. The location estimation device determines predicted values of a current location and a current estimation of the vehicle in accordance with a history of estimated locations and estimated attitudes of the vehicle, and performs the matching by using the predicted values.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: December 27, 2022
    Assignee: NIDEC-SHIMPO CORPORATION
    Inventors: Shinji Suzuki, Tetsuo Saeki, Masaji Nakatani
  • Patent number: 11532368
    Abstract: A method of adjusting operating conditions includes: a substrate; first conductive layers; a first semiconductor layers facing the first conductive layers; a second semiconductor layer connected to the first semiconductor layers; and an electric charge accumulating layer disposed between the first conductive layers and the first semiconductor layers. At a predetermined timing of a program operation, the second conductive layer which is one of the first conductive layers is supplied with a program voltage or a write pass voltage. The method executes: a first operation that supplies the second conductive layer with the write pass voltage and supplies a third conductive layer which is one of the plurality of first conductive layers with the program voltage; and a second operation that supplies the second conductive layer with a verify voltage and supplies the third conductive layer with a voltage.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: December 20, 2022
    Assignee: Kioxia Corporation
    Inventor: Shinji Suzuki
  • Patent number: 11493116
    Abstract: Provided is a micro head having a simple structure and yet entailing extremely little backlash. A micro head includes a spindle, a sleeve, a thimble, a backlash absorbing member, and a collar, wherein the cylindrical backlash absorbing member is fixed to the sleeve in a state where the spindle is inserted at a position in the sleeve.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: November 8, 2022
    Assignee: BIBLIOS Co., LTD.
    Inventors: Yoshiharu Nakatomi, Takeshi Onodera, Shinji Suzuki
  • Publication number: 20220305470
    Abstract: A silicon carbide porous body contains ?-SiC particles, Si particles, and metal silicide particles. The maximum particle diameter of the ?-SIC particles is not smaller than 15 ?m. The content of the Si particles is not lower than 10 mass %. The maximum particle diameter of the Si particles is not larger than 40 ?m. Further, an oxide coating film having a thickness not smaller than 0.01 ?m and not larger than 5 ?m is provided on surfaces of the Si particles.
    Type: Application
    Filed: February 4, 2022
    Publication date: September 29, 2022
    Applicant: NGK INSULATORS, LTD.
    Inventors: Shinji SUZUKI, Kyohei ATSUJI, Takahiro TOMITA
  • Publication number: 20220306539
    Abstract: A composite sintered body contains a silicon phase which is a main phase, a cordierite phase, and an amorphous phase containing Si. Further, the volume resistivity thereof at a room temperature is not lower than 0.1?·cm and not higher than 2.5?·cm.
    Type: Application
    Filed: February 4, 2022
    Publication date: September 29, 2022
    Applicant: NGK INSULATORS, LTD.
    Inventors: Kyohei ATSUJI, Shinji SUZUKI, Shinpei OSHIMA, Takahiro TOMITA
  • Publication number: 20220299077
    Abstract: This disk brake includes an attachment member that has support portions movably supporting a pair of brake pads, and a caliper that pressurizes the brake pads against a disk. The attachment member has outer circumferential frame portions, a coupling beam portion, and support main body portions. The outer circumferential frame portions extend in a disk circumferential direction so as to cover the disk while straddling the disk. The coupling beam portion couples the support portions to each other. The support main body portions form the support portions. The outer frame constituting portions constitute the outer frames of the support main body portions. Positions of disk-axially outward side end surfaces in a disk axial direction are the same as positions of the disk-axially outward side end surfaces of the caliper or on sides outward in the disk axial direction.
    Type: Application
    Filed: November 26, 2020
    Publication date: September 22, 2022
    Inventors: Miyuki UNO, Junichi HASHIMOTO, Shinji SUZUKI, Yoshihiro IWAMA, Masaru ODA
  • Patent number: 11446778
    Abstract: A stage mechanism includes a feed screw, a fixed stage having a space portion incorporating the feed screw, a movable stage, and a backlash absorbing portion. The feed screw has a first end portion and a second end portion. The stage mechanism further includes a deviation preventing portion preventing the feed screw from deviating in a direction toward the first end portion and a pressing force adjusting portion adjusting the pressing force by which the feed screw is pressed in a direction from the second end portion side to the first end portion. The deviation preventing portion is in contact with a wall of the space portion on the first end portion side. The pressing force adjusting portion is in line contact with and presses the second end portion.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: September 20, 2022
    Assignee: BIBLIOS Co., LTD.
    Inventors: Yoshiharu Nakatomi, Takeshi Onodera, Shinji Suzuki
  • Patent number: 11365158
    Abstract: A honeycomb structure has a plurality of cells formed by a plurality of partition walls. The partition walls are formed of a porous material composed predominantly of cordierite. Each partition wall includes surface layer portions having a porosity of 50% or more and an inside portion having a porosity of 50% or more, the surface layer portions being portions ranging respectively from opposite surfaces to a depth corresponding to 25% of the thickness of the partition wall, and the inside portion being the other portion. The surface layer portions and the inside portion both include pores having axial pore widths of less than 30 ?m and pores having axial pore widths of 30 ?m or more. A mean axial pore width in the surface layer portions is smaller than a mean axial pore width in the inside portion.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: June 21, 2022
    Assignee: NGK Insulators, Ltd.
    Inventors: Toru Hayase, Shinji Suzuki, Shinpei Oshima, Takahiro Tomita
  • Publication number: 20220134487
    Abstract: A joined body includes a junction target, an underlying layer, an electrode part, and a fixed layer. The conductive underlying layer is fixed on a surface of the junction target. The electrode part is fixed on the underlying layer. The conductive fixed layer is fixed on the underlying layer with the electrode part interposed therebetween. Respective porosities of the underlying layer and the fixed layer are each not higher than 10%.
    Type: Application
    Filed: October 18, 2021
    Publication date: May 5, 2022
    Applicant: NGK INSULATORS, LTD.
    Inventors: Shinji SUZUKI, Takafumi KIMATA, Takahiro TOMITA
  • Patent number: 11308813
    Abstract: There is provided a flight management system for managing a flight plan of flying objects that fly among ports.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: April 19, 2022
    Assignees: The University of Tokyo, BLUE INNOVATION Co., Ltd.
    Inventors: Christopher Thomas Raabe, Shinji Suzuki, Takeshi Tsuchiya, Masayuki Kumada, Kazuya Sakai, Takashi Matsuo, Tsuyoshi Chiba
  • Publication number: 20220059175
    Abstract: A method of adjusting operating conditions includes: a substrate; first conductive layers; a first semiconductor layers facing the first conductive layers; a second semiconductor layer connected to the first semiconductor layers; and an electric charge accumulating layer disposed between the first conductive layers and the first semiconductor layers. At a predetermined timing of a program operation, the second conductive layer which is one of the first conductive layers is supplied with a program voltage or a write pass voltage. The method executes: a first operation that supplies the second conductive layer with the write pass voltage and supplies a third conductive layer which is one of the plurality of first conductive layers with the program voltage; and a second operation that supplies the second conductive layer with a verify voltage and supplies the third conductive layer with a voltage.
    Type: Application
    Filed: March 10, 2021
    Publication date: February 24, 2022
    Applicant: Kioxia Corporation
    Inventor: Shinji SUZUKI
  • Publication number: 20220050048
    Abstract: A microplate reader includes a plurality of sets of: a light emitting portion disposed on one side of a microplate and corresponding to one well of the microplate; a light receiving portion disposed on an opposite side to the light emitting portion across the microplate and corresponding to one well of the microplate; and a light receiving light guide path disposed between the light receiving portion and the microplate and guiding light emitted from the light emitting portion and passing through a sample contained in the well to the light receiving portion. The microplate reader further includes a light guiding section configured to enclose a plurality of the light receiving light guide paths by an enclosure member made of a pigment-containing resin containing a pigment having a light-absorbing property. Light emitted from one light emitting portion passing through one light receiving light guide path and reaching one light receiving portion.
    Type: Application
    Filed: September 5, 2019
    Publication date: February 17, 2022
    Applicant: KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION
    Inventors: Kinichi MORITA, Shinji SUZUKI, Yuji OKI
  • Patent number: 11222700
    Abstract: According to one embodiment, a memory system includes: a memory device including a memory cell transistor; and a controller configured to make first data inaccessible from an outside of the memory system without erasing the first data, and increase a threshold voltage of the memory cell transistor, before determining to write data into the memory cell transistor. The controller is further configured to decrease, after determining to write second data into the memory cell transistor, the threshold voltage of the memory cell transistor to bring the memory cell transistor into an erase state; and write, after bringing the memory cell transistor into the erase state, the second data into the memory cell transistor.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 11, 2022
    Assignee: Kioxia Corporation
    Inventor: Shinji Suzuki
  • Patent number: 11211668
    Abstract: A power storage apparatus has a case accommodating an electrode assembly, and a release valve present in the wall of the case. The electrode assembly includes electrodes. A shielding member is arranged between the inner surface of the wall and the end surface of the electrode assembly. A point located in a center of the case in a front view of the case taken in the stacking direction of the electrodes and located in a center of a dimension of the electrode assembly in the stacking direction is a center point, and a region surrounded by a plane connecting the center point and a contour of the pressure release valve at a shortest distance is a three-dimensional region. The shielding member includes a shielding portion that entirely covers a cross section of the three-dimensional region along the end face of the electrode assembly.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: December 28, 2021
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Tomohiro Nakamura, Takayuki Hirose, Yusuke Yamashita, Masato Ogasawara, Shinji Suzuki, Yasuaki Takenaka, Ryuji Oide, Mikiya Kurita, Atsushi Minagata