Patents by Inventor Shinji Yajima

Shinji Yajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7141939
    Abstract: A power supply circuit for supplying power to a load includes an antenna which receives electric power, a rectifier coupled to the antenna and configured to convert an alternating voltage supplied from the antenna into a direct-current voltage, a voltage step-down circuit which steps down the direct-current voltage to generate an output voltage for provision to the load, a regulator which controls a resistance connected between the output voltage and a ground voltage in parallel with the load, thereby controlling a voltage level of the output voltage.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: November 28, 2006
    Assignees: Fujitsu Limited, FFC Limited
    Inventors: Takayuki Nagasawa, Shinji Yajima, Toshiyuki Teramoto, Shunsuke Fueki, Hiroshi Okubo, Masayoshi Isobe, Takeshi Kikuchi, Andrzej Radecki
  • Patent number: 6970690
    Abstract: A data processing apparatus and card-sized data processing device that consume less power and operate more reliably. An antenna captures a radio wave sent from an external reader/writer device, and a receiver converts it into an electrical signal. From this electrical signal, a first power supply circuit produces a first supply voltage for use in analog circuits. A second power supply circuit produces a second supply voltage that is different from the first supply voltage, for use in memory circuits. A third power supply circuit produces a third supply voltage that is different from the other voltages, for use in digital circuits. The memory and digital circuits thus operate with different supply voltages optimized for their individual requirements. Total power consumption of the device is reduced by lowering the voltage for the digital circuits, including MPU, while giving a higher voltage to the memory circuits.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: November 29, 2005
    Assignee: Fujitsu Limited
    Inventors: Shinji Yajima, Shunsuke Fueki, Masao Nakajima
  • Publication number: 20050168159
    Abstract: A power supply circuit for supplying power to a load includes an antenna which receives electric power, a rectifier coupled to the antenna and configured to convert an alternating voltage supplied from the antenna into a direct-current voltage, a voltage step-down circuit which steps down the direct-current voltage to generate an output voltage for provision to the load, a regulator which controls a resistance connected between the output voltage and a ground voltage in parallel with the load, thereby controlling a voltage level of the output voltage.
    Type: Application
    Filed: July 22, 2004
    Publication date: August 4, 2005
    Inventors: Takayuki Nagasawa, Shinji Yajima, Toshiyuki Teramoto, Shunsuke Fueki, Hiroshi Okubo, Masayoshi Isobe, Takeshi Kikuchi, Andrzej Radecki
  • Publication number: 20030083037
    Abstract: A data processing apparatus and card-sized data processing device that consume less power and operate more reliably. An antenna captures a radio wave sent from an external reader/writer device, and a receiver converts it into an electrical signal. From this electrical signal, a first power supply circuit produces a first supply voltage for use in analog circuits. A second power supply circuit produces a second supply voltage that is different from the first supply voltage, for use in memory circuits. A third power supply circuit produces a third supply voltage that is different from the other voltages, for use in digital circuits. The memory and digital circuits thus operate with different supply voltages optimized for their individual requirements. Total power consumption of the device is reduced by lowering the voltage for the digital circuits, including MPU, while giving a higher voltage to the memory circuits.
    Type: Application
    Filed: April 29, 2002
    Publication date: May 1, 2003
    Applicant: Fujitsu Limited
    Inventors: Shinji Yajima, Shunsuke Fueki, Masao Nakajima
  • Patent number: 5430675
    Abstract: In an EEPROM, source electrodes S of memory cell transistors MT1 to MTn are grounded, via transistors MG1 to MGn. The source electrodes S are separated from each other so as to maintain the source electrode S of each of the memory cell transistors MT1 to MTn at an open state, even when a leak path is formed by the memory cell transistor MTi in the written state (low threshold voltage). In the EEPROM, an EPROM circuit in which the write operation can be continuously performed without the erase operation can be obtained. Further, an EEPROM circuit having the nonerasable region (the region which functions as the EPROM) and the erasable region (the region which functions as the EEPROM) can be also provided.
    Type: Grant
    Filed: October 13, 1993
    Date of Patent: July 4, 1995
    Assignee: Matsushita Electronics Corporation
    Inventors: Shinji Yajima, Junji Michiyama, Nobuyuki Ikeda