Abstract: According to one embodiment, a memory system includes first and second memory chips. The first memory chip has a first plane with a first block and a second block and a second plane with a third block and a fourth block. The second memory chip has a third plane with a fifth block and a sixth block and a fourth plane with a seventh block and an eighth block. The memory controller sets the first and third blocks as a first block unit in a user data storage area and the fifth and seventh blocks as a second block unit in the user data storage area. The memory controller allocates the second block, the fourth block, the sixth block, and the eighth block to a management data storage area. The memory controller manages user data operations for accessing the user data storage area in block units.

Abstract: According to one embodiment, a memory system includes first and second memory chips. The first memory chip has a first plane with a first block and a second block and a second plane with a third block and a fourth block. The second memory chip has a third plane with a fifth block and a sixth block and a fourth plane with a seventh block and an eighth block. The memory controller sets the first and third blocks as a first block unit in a user data storage area and the fifth and seventh blocks as a second block unit in the user data storage area. The memory controller allocates the second block, the fourth block, the sixth block, and the eighth block to a management data storage area. The memory controller manages user data operations for accessing the user data storage area in block units.

Abstract: According to on embodiment, a memory system includes a non-volatile memory, a memory controller including a data buffer configured to store first data, and a backup power supply configured to supply first power to the non-volatile memory and the memory controller, when second power from an external main power supply is off. The memory controller is configured to write second data including information identifying the first data in the non-volatile memory without writing the first data in the non-volatile memory, when the first power is supplied from the backup power supply, and transmit the information stored in the non-volatile memory to an external host device, after a recovery of the second power from the main power supply.

Abstract: According to on embodiment, a memory system includes a non-volatile memory, a memory controller including a data buffer configured to store first data, and a backup power supply configured to supply first power to the non-volatile memory and the memory controller, when second power from an external main power supply is off. The memory controller is configured to write second data including information identifying the first data in the non-volatile memory without writing the first data in the non-volatile memory, when the first power is supplied from the backup power supply, and transmit the information stored in the non-volatile memory to an external host device, after a recovery of the second power from the main power supply.

Abstract: A memory system which is accessible to a host device includes a volatile memory, a nonvolatile memory, and a memory controller that controls the volatile memory and the nonvolatile memory. The memory controller stores first data, which is stored in the volatile memory, in the nonvolatile memory, each time the memory controller stores second data, which is stored in the volatile memory, in the nonvolatile memory. The first data indicates a logical address and a deletion range designated by a deletion request received from the host device, and the second data is designated by a write request received from the host device.

Abstract: According to one embodiment, a memory system includes a first memory including a message queue having first to nth addresses (n?2, n is natural number), a first pointer showing one of the first to nth addresses, and a second pointer showing one of the first to nth addresses, a monitor unit which detects whether the first and second pointers show the first address, and a processing unit which changes an address shown by the first pointer from the first address to an ith address (n?i?2, i is natural number) when the first and second pointers show the first address. An address shown by the second pointer is incremented from the first address to a (j+1)th address (j?1, j is natural number) when first to jth messages are queued in the first to jth addresses.

Abstract: A memory system which is accessible to a host device includes a volatile memory, a nonvolatile memory, and a memory controller that controls the volatile memory and the nonvolatile memory. The memory controller stores first data, which is stored in the volatile memory, in the nonvolatile memory, each time the memory controller stores second data, which is stored in the volatile memory, in the nonvolatile memory. The first data indicates a logical address and a deletion range designated by a deletion request received from the host device, and the second data is designated by a write request received from the host device.

Abstract: According to one embodiment, a memory system includes a first memory including a message queue having first to nth addresses (n?2, n is natural number), a first pointer showing one of the first to nth addresses, and a second pointer showing one of the first to nth addresses, a monitor unit which detects whether the first and second pointers show the first address, and a processing unit which changes an address shown by the first pointer from the first address to an ith address (n?i?2, i is natural number) when the first and second pointers show the first address. An address shown by the second pointer is incremented from the first address to a (j+1)th address (j?1, j is natural number) when first to jth messages are queued in the first to jth addresses.

Abstract: A method of detecting an air gap in a gypsum-based building board includes cooling a surface of a gypsum-based building board that has generated heat because of a hydration reaction of calcined gypsum by applying a cooling medium to the surface, and detecting a temperature distribution of the surface of the gypsum-based building board after completion of the cooling.

Abstract: A memory system of one embodiment includes: a nonvolatile memory including a plurality of word lines each connected to memory cells, each one of the memory cells being capable storing two bits, the memory cells connected to one of the plurality of word lines constituting an upper page and a lower page, each one of the pages being a unit of data programming; a random access memory configured to store an address translation table indicating relationships between logical addresses designated by a host and physical addresses in the nonvolatile memory. The memory system of the embodiment further includes a memory controller which execute data fixing for saving the address translation table from the random access memory to the nonvolatile memory; and write dummy data to at least one page subsequent to the page in which valid data has been written in the nonvolatile memory before executing the data fixing.

Abstract: According to one embodiment, when loading of reverse lookup information from a nonvolatile first memory to a randomly accessible second memory has failed, a controller determines whether data at a first physical address is valid or invalid by using lookup information loaded from the first memory to the second memory.

Abstract: A memory system in embodiments includes a nonvolatile semiconductor memory that stores user data, a forward lookup address translation table and a reverse lookup address translation table, and a controller. The controller is configured to determine that the user data stored in the nonvolatile semiconductor memory is valid or invalid based on these two tables. The controller may perform data organizing of selecting data determined valid and rewriting the data in a new block. The controller may perform write processing and rewriting processing to the new block alternately at a predetermined ratio. The controller may determine whether a predetermined condition is satisfied on a basis of addresses included in write requests and write data in the MLC mode when the condition is satisfied and write data in the SLC mode when the condition is not satisfied.

Abstract: According to the embodiments, a first storage area and a second storage area specified by a trim request is managed by a first management unit, and the second storage area specified by the trim request is managed by a second management unit. A block in which data of the first management unit are all specified by the trim request from the first or second storage areas and a block in which data of the second management unit are all specified by the trim request from the second storage area are released.

Abstract: According to one embodiment, when loading of reverse lookup information from a nonvolatile first memory to a randomly accessible second memory has failed, a controller determines whether data at a first physical address is valid or invalid by using lookup information loaded from the first memory to the second memory.

Abstract: A method of detecting an air gap in a gypsum-based building board includes cooling a surface of a gypsum-based building board that has generated heat because of a hydration reaction of calcined gypsum by applying a cooling medium to the surface, and detecting a temperature distribution of the surface of the gypsum-based building board after completion of the cooling.

Abstract: A first log indicating that a system is running is recorded in a second storage unit before a first difference log is recorded in the second storage unit after system startup, and a second log indicating that the system halts is recorded in the second storage unit following the difference log, at the time of normal system halt, and it is judged whether normal system halt has been performed or an incorrect power-off sequence has been performed last time, based on a recorded state of the first and second logs in the second storage unit, at the time of system startup, thereby detecting an incorrect power-off easily and reliably.

Abstract: A memory system comprising a volatile memory unit, a nonvolatile memory unit, and a controller that performs data transfer between a host system and the nonvolatile memory unit via the volatile memory unit stores management information including a storage position of the data stored in the nonvolatile memory unit during a startup operation into the volatile memory unit, and performs, while updating stored management information, data management in the volatile and nonvolatile memory units based on the stored management information. The nonvolatile memory unit includes a snapshot storing area storing a snapshot which is the management information stored in the volatile memory unit at a certain point, a main log storing area storing a main log which is an update information of the management information stored in the volatile memory unit, and a backup log storing area storing a backup log having contents same as contents of the main log.

Abstract: A memory system in embodiments includes a nonvolatile semiconductor memory that stores user data, a forward lookup address translation table and a reverse lookup address translation table, and a controller. The controller is configured to determine that the user data stored in the nonvolatile semiconductor memory is valid or invalid based on these two tables. The controller may perform data organizing of selecting data determined valid and rewriting the data in a new block. The controller may perform write processing and rewriting processing to the new block alternately at a predetermined ratio. The controller may determine whether a predetermined condition is satisfied on a basis of addresses included in write requests and write data in the MLC mode when the condition is satisfied and write data in the SLC mode when the condition is not satisfied.

Abstract: According to the embodiments, a first storage area and a second storage area specified by a trim request is managed by a first management unit, and the second storage area specified by the trim request is managed by a second management unit. A block in which data of the first management unit are all specified by the trim request from the first or second storage areas and a block in which data of the second management unit are all specified by the trim request from the second storage area are released.

Abstract: A memory system according to an embodiment of the present invention includes: a log overflow control unit configured, when a predetermined condition is satisfied, to prohibit a recording operation of a log and to cause a log recording unit only to perform an updating operation of a management table, and when a commit condition is satisfied after the predetermined condition has been satisfied, to prohibit a commit operation by a log reflecting unit and to cause a snapshot storing unit to perform a snapshot storing operation.