Patents by Inventor Shinjiro Kameda

Shinjiro Kameda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10840277
    Abstract: A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged in a two-dimensional array, in which the imaging region includes an effective pixel and a black reference pixel; and a shape of a floating diffusion portion in the effective pixel is different from that of a floating diffusion portion in the black reference pixel.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: November 17, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Shinjiro Kameda, Eiichi Funatsu
  • Patent number: 9490291
    Abstract: A MOS type solid state imaging device in which unit pixels, each having a photodiode, a transfer transistor for transferring the signal of the photodiode to a floating node, an amplifier transistor for outputting the signal of the floating node to a vertical signal line, and a reset transistor for resetting the floating node are arrayed in a matrix. A gate voltage of the reset transistor is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: November 8, 2016
    Assignee: SONY CORPORATION
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Publication number: 20150334270
    Abstract: A MOS type solid state imaging device in which unit pixels, each having a photodiode, a transfer transistor for transferring the signal of the photodiode to a floating node, an amplifier transistor for outputting the signal of the floating node to a vertical signal line, and a reset transistor for resetting the floating node are arrayed in a matrix. A gate voltage of the reset transistor is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Application
    Filed: June 23, 2015
    Publication date: November 19, 2015
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Patent number: 9129879
    Abstract: An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: September 8, 2015
    Assignee: SONY CORPORATION
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Publication number: 20150249798
    Abstract: An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (OV), and a negative power source potential (for example ?1V).
    Type: Application
    Filed: February 26, 2015
    Publication date: September 3, 2015
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Publication number: 20130313673
    Abstract: A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged in a two-dimensional array, in which the imaging region includes an effective pixel and a black reference pixel; and a shape of a floating diffusion portion in the effective pixel is different from that of a floating diffusion portion in the black reference pixel.
    Type: Application
    Filed: July 31, 2013
    Publication date: November 28, 2013
    Applicant: Sony Corporation
    Inventors: Shinjiro KAMEDA, Eiichi FUNATSU
  • Patent number: 8558932
    Abstract: A MOS type solid state imaging device having unit pixels, each having a photodiode a transfer transistor for transferring the signal of the photodiode to a floating node, an amplifier transistor for outputting the signal of the floating node to a vertical signal line, and a reset transistor for resetting the floating node. A gate voltage of the reset transistor is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: October 15, 2013
    Assignee: Sony Corporation
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Patent number: 8519502
    Abstract: A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged in a two-dimensional array, in which the imaging region includes an effective pixel and a black reference pixel; and a shape of a floating diffusion portion in the effective pixel is different from that of a floating diffusion portion in the black reference pixel.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: August 27, 2013
    Assignee: Sony Corporation
    Inventors: Shinjiro Kameda, Eiichi Funatsu
  • Patent number: 8227734
    Abstract: There is provided a solid-state imaging device including: a plurality of aperture pixels configured to be used for capturing of an image; a plurality of first light-shielded pixels configured to be shielded from light for detection of an optical black level, a temperature dependence of a dark current in the first light-shielded pixels being larger than a temperature dependence of a dark current in the aperture pixels; and a plurality of second light-shielded pixels configured to be shielded from light for detection of an optical black level, a temperature dependence of a dark current in the second light-shielded pixels being smaller than a temperature dependence of a dark current in the aperture pixels.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: July 24, 2012
    Assignee: Sony Corporation
    Inventor: Shinjiro Kameda
  • Publication number: 20120105698
    Abstract: A MOS type solid state imaging device having unit pixels, each having a photodiode a transfer transistor for transferring the signal of the photodiode to a floating node, an amplifier transistor for outputting the signal of the floating node to a vertical signal line, and a reset transistor for resetting the floating node. A gate voltage of the reset transistor is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Application
    Filed: November 14, 2011
    Publication date: May 3, 2012
    Applicant: SONY CORPORATION
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Patent number: 8072528
    Abstract: A solid state imaging device able to make noise from a nonselected row small, able to suppress occurrence of vertical stripes in a bright scene, not requiring charging including a floating node capacity via a reset transistor, able to prevent an increase of a driver size of a drain line, and able to secure high speed operation and a camera system using this as the imaging device are provided. An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: December 6, 2011
    Assignee: Sony Corporation
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Publication number: 20100073536
    Abstract: A solid state imaging device able to make noise from a nonselected row small, able to suppress occurrence of vertical stripes in a bright scene, not requiring charging including a floating node capacity via a reset transistor, able to prevent an increase of a driver size of a drain line, and able to secure high speed operation and a camera system using this as the imaging device are provided. An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Application
    Filed: November 30, 2009
    Publication date: March 25, 2010
    Applicant: SONY CORPORATION
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Patent number: 7626625
    Abstract: A solid state imaging device able to make noise from a nonselected row small, able to suppress occurrence of vertical stripes in a bright scene, not requiring charging including a floating node capacity via a reset transistor, able to prevent an increase of a driver size of a drain line, and able to secure high speed operation and a camera system using this as the imaging device are provided. An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: December 1, 2009
    Assignee: Sony Corporation
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Publication number: 20080197268
    Abstract: There is provided a solid-state imaging device including: a plurality of aperture pixels configured to be used for capturing of an image; a plurality of first light-shielded pixels configured to be shielded from light for detection of an optical black level, a temperature dependence of a dark current in the first light-shielded pixels being larger than a temperature dependence of a dark current in the aperture pixels; and a plurality of second light-shielded pixels configured to be shielded from light for detection of an optical black level, a temperature dependence of a dark current in the second light-shielded pixels being smaller than a temperature dependence of a dark current in the aperture pixels.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 21, 2008
    Inventor: Shinjiro Kameda
  • Publication number: 20080029837
    Abstract: A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged in a two-dimensional array, in which the imaging region includes an effective pixel and a black reference pixel; and a shape of a floating diffusion portion in the effective pixel is different from that of a floating diffusion portion in the black reference pixel.
    Type: Application
    Filed: July 6, 2007
    Publication date: February 7, 2008
    Inventors: Shinjiro Kameda, Eiichi Funatsu