Patents by Inventor Shinobu Kawamura

Shinobu Kawamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4866541
    Abstract: A control circuit for controlling the erasing of an information signal recorded on an optical disk such that the information signal is erased except for the vertical blanking interval and for the interval corresponding to the address signal of the information on the disk. The rest of the information signal including the horizontal synchronizing signal is erased either continuously or intermittently or is not erased. The circuit produces a control signal which assumes a first logical state for enabling the erasing and a second logical state for disabling the erasing responsive to a horizontal synchronizing signal, a vertical synchronizing signal and a command signal commanding the erasing of a particular information signal on the disk.
    Type: Grant
    Filed: June 20, 1988
    Date of Patent: September 12, 1989
    Assignee: TEAC Corporation
    Inventors: Shinobu Kawamura, Tadao Nagai