Patents by Inventor Shinobu Kurosaka

Shinobu Kurosaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stacked semiconductor device and method of connection test in the same
    Patent number: 8441278
    Abstract: A stacked semiconductor device includes a first semiconductor device equipped with a first semiconductor chip 14 having a transistor circuit and protection diodes, and a second semiconductor device equipped with a second semiconductor chip 24 having a transistor circuit and protection diodes, and stacked on the first semiconductor device via a connection portion, wherein a power supply line connected to the first and second semiconductor chips is used in common, and a forward ON voltage of the protection diodes of the first semiconductor chip is set higher than a forward ON voltage of the protection diodes of the second semiconductor chip 24. When a connection test is executed, the forward ON voltage of the protection diodes of the first semiconductor chip or the second semiconductor chip is detected and then normal/open is judged.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: May 14, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Norio Yamanishi, Shinobu Kurosaka
  • STACKED SEMICONDUCTOR DEVICE AND METHOD OF CONNECTION TEST IN THE SAME
    Publication number: 20110074438
    Abstract: A stacked semiconductor device includes a first semiconductor device equipped with a first semiconductor chip 14 having a transistor circuit and protection diodes, and a second semiconductor device equipped with a second semiconductor chip 24 having a transistor circuit and protection diodes, and stacked on the first semiconductor device via a connection portion, wherein a power supply line connected to the first and second semiconductor chips is used in common, and a forward ON voltage of the protection diodes of the first semiconductor chip is set higher than a forward ON voltage of the protection diodes of the second semiconductor chip 24. When a connection test is executed, the forward ON voltage of the protection diodes of the first semiconductor chip or the second semiconductor chip is detected and then normal/open is judged.
    Type: Application
    Filed: September 15, 2010
    Publication date: March 31, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Norio YAMANISHI, Shinobu Kurosaka