Patents by Inventor Shinobu Murai

Shinobu Murai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6678224
    Abstract: A tracking error balance adjustment circuit, and a current control circuit used for a variable gain RF amplifier automatically controlled to output a signal having a predetermined amplitude. The tracking error balance adjustment circuit comprises two separate gain adjusting circuits, each having variable attenuation circuit having first gm amplifier of variable gm type, a second gm amplifier of variable gm type connected to the variable attenuation circuit, and an output circuit connected to the second gm amplifier, comprising an operational amplifier circuit having feedback resistor, wherein the first and second gm amplifiers are differentially controlled commonly by a control current.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: January 13, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryuichi Yamashita, Hiroyuki Haga, Shinobu Murai
  • Publication number: 20030072227
    Abstract: A tracking error balance adjustment circuit, and a current control circuit used for a variable gain RF amplifier automatically controlled to output a signal having a predetermined amplitude. The tracking error balance adjustment circuit comprises two separate gain adjusting circuits, each having variable attenuation circuit having first gm amplifier of variable gm type, a second gm amplifier of variable gm type connected to the variable attenuation circuit, and an output circuit connected to the second gm amplifier, comprising an operational amplifier circuit having feedback resistor, wherein the first and second gm amplifiers are differentially controlled commonly by a control current.
    Type: Application
    Filed: November 25, 2002
    Publication date: April 17, 2003
    Inventors: Ryuichi Yamashita, Hiroyuki Haga, Shinobu Murai
  • Patent number: 6504799
    Abstract: A tracking error balance adjustment circuit, and a current control circuit used for a variable gain RF amplifier automatically controlled to output a signal having a predetermined amplitude. The tracking error balance adjustment circuit comprises two separate gain adjusting circuits, each having variable attenuation circuit having first gm amplifier of variable gm type, a second gm amplifier of variable gm type connected to the variable attenuation circuit, and an output circuit connected to the second gm amplifier, comprising an operational amplifier circuit having feedback resistor, wherein the first and second gm amplifiers are differentially controlled commonly by a control current.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: January 7, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryuichi Yamashita, Hiroyuki Haga, Shinobu Murai