Abstract: To provide a highly accurate and small AD converter. The AD converter converts an analog voltage Vin into a digital code DC of N-bit, and includes memory blocks MB1 to MB (2N?1). Each memory block MB (2n?1) includes (2n?1) memory cells 1 for an MRAM. After stored data of the memory cell 1 is reset to “0”, an analog current Iin proportional to the analog voltage Vin is shunted to the (2n?1) bit lines BL of the each memory block MB (2n?1). Stored data of the memory cells 1 of the memory blocks MB1 to MB (2N?1) is read to generate the digital code DC. Accordingly, a ladder resistance is unnecessary.

Abstract: A semiconductor device has a magnetoresistive element, a bit line over the magnetoresistive element, and a yoke cover over the bit line. To form the yoke cover, a laminate film is first formed over the bit line, the laminate film having a first barrier metal layer, a magnetic layer, and a second barrier metal layer which are formed successively over the bit line. Then, the laminate film is subjected to: reactive ion etching with a gas mixture of a carbon tetrafluoride (CF4) gas and an argon (Ar) gas, reactive ion etching with a gas mixture of carbon monoxide (CO), an ammonia (NH3) gas, and an argon (Ar) gas, and reactive ion etching with a gas mixture of a carbon tetrafluoride (CF4) gas and an argon (Ar) gas.

Abstract: A method of manufacturing a semiconductor device answerable to refinement of circuits by correctly connecting adjacent small patterns with each other with excellent reproducibility in connective exposure and a semiconductor device manufactured by this method are proposed. According to this method of manufacturing a semiconductor device, connective exposure is performed by dividing a pattern formed on a semiconductor substrate into a plurality of patterns and exposing the plurality of divided patterns in a connective manner, by forming marks for adjusting arrangement of the patterns to be connected with each other on the semiconductor substrate before exposing patterns of a semiconductor element and connectively exposing the patterns of the semiconductor element in coincidence with the marks for adjusting arrangement.

Abstract: A method of manufacturing a semiconductor device answerable to refinement of circuits by correctly connecting adjacent small patterns with each other with excellent reproducibility in connective exposure and a semiconductor device manufactured by this method are proposed. According to this method of manufacturing a semiconductor device, connective exposure is performed by dividing a pattern formed on a semiconductor substrate into a plurality of patterns and exposing the plurality of divided patterns in a connective manner, by forming marks for adjusting arrangement of the patterns to be connected with each other on the semiconductor substrate before exposing patterns of a semiconductor element and connectively exposing the patterns of the semiconductor element in coincidence with the marks for adjusting arrangement.

Abstract: A photolithographic process using an X-direction delimiting mask (S11) for aligning respective side faces of a TMR element (1) and a strap (5) situated in a negative X side is performed, to shape the TMR element (1) and the strap (5) into desired configurations. The X-direction delimiting mask (S11) includes a straight edge and is disposed such that the straight edge is parallel to a Y direction and crosses both the TMR element (1) and the strap (5) in plan view. In use of the X-direction delimiting mask (S11), respective portions of the TMR element (1) and the strap (5) situated in a positive X side relative to the straight edge in plan view are covered with the X-direction delimiting mask (S11).

Abstract: A method of manufacturing a semiconductor device answerable to refinement of circuits by correctly connecting adjacent small patterns with each other with excellent reproducibility in connective exposure and a semiconductor device manufactured by this method are proposed. According to this method of manufacturing a semiconductor device, connective exposure is performed by dividing a pattern formed on a semiconductor substrate into a plurality of patterns and exposing the plurality of divided patterns in a connective manner, by forming marks for adjusting arrangement of the patterns to be connected with each other on the semiconductor substrate before exposing patterns of a semiconductor element and connectively exposing the patterns of the semiconductor element in coincidence with the marks for adjusting arrangement.

Abstract: A photomask for focus monitoring of the present invention is provided with a substrate that allows the exposure light to pass through and a unit mask structure for focus monitoring. Unit mask structure for focus monitoring has two patterns, and that are formed on the surface of substrate and a light blocking film that has a rear surface pattern that is formed on the rear surface of substrate for substantially differentiating the incident directions of the exposure light that enters two patterns, and for position measurement. When the dimension of rear surface pattern is L and the wavelength of the exposure light is ?, L/? is 10, or greater.

Abstract: A photolithographic process using an X-direction delimiting mask (S11) for aligning respective side faces of a TMR element (1) and a strap (5) situated in a negative X side is performed, to shape the TMR element (1) and the strap (5) into desired configurations. The X-direction delimiting mask (S11) includes a straight edge and is disposed such that the straight edge is parallel to a Y direction and crosses both the TMR element (1) and the strap (5) in plan view. In use of the X-direction delimiting mask (S11), respective portions of the TMR element (1) and the strap (5) situated in a positive X side relative to the straight edge in plan view are covered with the X-direction delimiting mask (S11).

Abstract: There are provided a method and an apparatus for evaluating a wafer configuration which can accurately evaluate a peripheral portion of a wafer as compared with the conventional SFQR or the like, which comprises: measuring a configuration of a wafer at positions with a prescribed space within a surface of the wafer; providing a first region (W1) within the wafer surface for calculating a reference line or a reference plane from the measured wafer configuration; calculating a reference line (10a) or a reference plane (10b) in the first region (W1); providing a second region (W2) to be evaluated outside the first region; extrapolating the reference line (10a) or reference plane (10b) to the second region (W2); analyzing a difference between the configuration of the second region and the reference line or reference plane within the second region; and calculating the analyzed difference as surface characteristics.

Abstract: A photomask for focus monitoring of the present invention is provided with a substrate that allows the exposure light to pass through and a unit mask structure for focus monitoring. Unit mask structure for focus monitoring has two patterns, and that are formed on the surface of substrate and a light blocking film that has a rear surface pattern that is formed on the rear surface of substrate for substantially differentiating the incident directions of the exposure light that enters two patterns, and for position measurement. When the dimension of rear surface pattern is L and the wavelength of the exposure light is &lgr;, L/&lgr; is 10, or greater.

Abstract: A focus monitoring method of the invention is characterized by transferring the pattern of a photo mask for phase shift focus monitor onto a photoresist on a semiconductor substrate by using modified illumination. Photo mask for phase shift focus monitor has first and second light transmitting portions which are adjacent to each other while sandwiching a shielding pattern, and is constructed so that a phase difference other than 180 degrees occurs between exposure light passed through the first light transmitting portion and exposure light passed through the second light transmitting portion. Consequently, a focus monitoring method, a focus monitor system, and a semiconductor fabricating method with high detection sensitivity in the z direction and which do not require changing of an illumination aperture can be achieved.

Abstract: A photomask for focus monitoring of the present invention is provided with a substrate that allows the exposure light to pass through and a unit mask structure for focus monitoring. Unit mask structure for focus monitoring has two patterns, and that are formed on the surface of substrate and a light blocking film that has a rear surface pattern that is formed on the rear surface of substrate for substantially differentiating the incident directions of the exposure light that enters two patterns, and for position measurement. When the dimension of rear surface pattern is L and the wavelength of the exposure light is &lgr;, L/&lgr; is 10, or greater.

Abstract: The present invention provides a photomask, a semiconductor device, and a method for exposing through the photomask. The photomask comprises a photomask substrate, and an on-mask circuit area including an on-mask circuit pattern and an on-mask test mark area including an on-mask test pattern, both formed on the surface of the substrate, wherein the photomask substrate further includes an on-mask photolithography screening mark area including an on-mask comparison pattern and an on-mask screening pattern, the on-mask comparison pattern has substantially the same configuration as at least a part of the on-mask circuit pattern, and the on-mask screening pattern has substantially the same configuration as at least a part of the on-mask test pattern. The present invention allows it to measure the actual displacement generated from an overlaying (i.e. alignment) process for the purpose of eliminating of an the overlay displacement which can take place in a photolithography process.

Abstract: A photomask for focus monitoring of the present invention is provided with a substrate that allows the exposure light to pass through and a unit mask structure for focus monitoring. Unit mask structure for focus monitoring has two patterns, and that are formed on the surface of substrate and a light blocking film that has a rear surface pattern that is formed on the rear surface of substrate for substantially differentiating the incident directions of the exposure light that enters two patterns, and for position measurement. When the dimension of rear surface pattern is L and the wavelength of the exposure light is &lgr;, L/&lgr; is 10, or greater.

Abstract: A focus monitoring method of the invention is characterized by transferring the pattern of a photo mask for phase shift focus monitor onto a photoresist on a semiconductor substrate by using modified illumination. Photo mask for phase shift focus monitor has first and second light transmitting portions which are adjacent to each other while sandwiching a shielding pattern, and is constructed so that a phase difference other than 180 degrees occurs between exposure light passed through the first light transmitting portion and exposure light passed through the second light transmitting portion. Consequently, a focus monitoring method, a focus monitor system, and a semiconductor fabricating method with high detection sensitivity in the z direction and which do not require changing of an illumination aperture can be achieved.

Abstract: There are provided a method and an apparatus for evaluating a wafer configuration which can accurately evaluate a peripheral portion of a wafer as compared with the conventional SFQR or the like, which comprises: measuring a configuration of a wafer at positions with a prescribed space within a surface of the wafer; providing a first region (W1) within the wafer surface for calculating a reference line or a reference plane from the measured wafer configuration; calculating a reference line (10a) or a reference plane (10b) in the first region (W1); providing a second region (W2) to be evaluated outside the first region; extrapolating the reference line (10a) or reference plane (10b) to the second region (W2); analyzing a difference between the configuration of the second region and the reference line or reference plane within the second region; and calculating the analyzed difference as surface characteristics.

Abstract: A semiconductor device having a registration accuracy measurement mark allows measurement in registration to be within an allowable measurement error even if there is a difference in height between a master pattern and a pattern of the registration accuracy measurement mark. The width of the second layer registration accuracy measurement mark pattern formed as a line is made larger than that of the second layer master pattern formed as a line by 0.85 &mgr;m to 1.0 &mgr;m. Accordingly, the difference in the amount of offset due to aberration upon transfer of the patterns between the second layer master pattern and the second layer registration accuracy measurement mark pattern can be within an allowable range in the overlay measurement. In addition, even if the second layer registration accuracy measurement mark pattern and the second layer master pattern are formed to have a difference in height (maximum 0.6 &mgr;m), the depth of focus (1.2 &mgr;m) is ensured.

Abstract: On a semiconductor substrate, a registration measurement mark and intended patterns monitored by the registration measurement mark are provided. Step or level difference between the surface of registration measurement mark and the surface of intended patterns is made to be within .+-.0.2 .mu.m. By such structure, it becomes possible to accurately monitor the intended patterns by utilizing the registration measurement mark.