Abstract: In one embodiment of the present invention, a unit circuit of a shift register includes a bootstrap circuit configured with a transistor T1, a transistor T2 and a capacitor, a transistor T3, a transistor T4, and a reset signal generation circuit. By use of two-phase clock signals and whose high level periods do not overlap with each other, the reset signal generation circuit generates a reset signal which is at a high level in a normal state and changes to a low level when an input signal turns into the high level. During a period that the reset signal is at the high level, transistors T3 and T4 perform discharge of a node and pull-down of an output signal. Thus, it is possible to obtain a power-saving shift register that fixes an output signal at a low level in a normal state without allowing a through current to flow therein.

Abstract: The chair-type massage apparatus is characterized in that, when placed with its back facing a room wall, it can be located near the wall and, when its seat is made movable back-and-forth, the leg kneading device mounted at the front of the seat can be used without being obstructed by the back-and-forth movement. The chair-type massage apparatus 1 comprises the seat 2, the base frame 6, and the backrest 3 reclinably mounted at the rear of the seat. During reclining, the upper end of the backrest moves vertically along one vertical line. The leg kneading device is mounted at the front of the seat. The base frame has the seat moving mechanism 15 for moving the seat at least in the front-rear direction, and the seat has the position changing mechanism 16 for effecting positional change of the leg kneading device relative to the seat while maintaining the relative distance.

Abstract: There is provided a massage apparatus capable of providing optimum massage effects even with variations in thickness of to-be-treated area such as a lower leg from user to user. The massage apparatus 1 comprises a massage section 7 having a stationary massage member 15 and a movable massage member 16, a rotary shaft 9, 10 disposed so as to pass through the base end of the movable massage member 16, a driving section 11 for rotatably driving the rotary shaft 9, 10, a pair of right-hand and left-hand changer sections 12, 13 for changing a rotational force of the rotary shaft 9, 19 into an action of movement of the movable massage member 16 toward and away from the stationary massage member 15; and a breadth adjustment mechanism 14 capable of positioning movement of the stationary massage member 15 in directions toward and away from the movable massage member 16.

Abstract: There is provided a massage device capable of producing innovative and comfortable massage effect by massaging a target body part over a wide area in its lengthwise direction with substantially rectilinear motion of a pressure-applying point. The massage device 1 comprises a pair of treatment members 23, 24 arranged face-to-face with each other at a spacing large enough for insertion of part of human body; a holding mechanism 162 for holding and pressing the body part in sandwich style by moving at least one of the paired treatment members or both of them 23, 24 in the direction of width of the body part set in place between the paired treatment members; and a moving mechanism 26 for moving the treatment member 23, 24 in the direction of length of the body part while maintaining the holding condition of the treatment member 23, 24 effected by the holding mechanism 162.

Abstract: There is provided a back kneading device capable of causing a massage mechanism to protrude forward and return to an original normal position wherein there occurs no increase in size and complexity in construction. The back kneading device 4 mounted in a chair-type massage apparatus 1 comprises the massage mechanism 10 having a pair of right-hand and left-hand massage members 17, a base member 12 for pivotally supporting the mechanism 10 at its lower end, a vertical movement mechanism 13 for imparting a vertical motion to the base member 12, an advancing and retracting mechanism 14 for rockably driving massage mechanism 10, and a rock restricting mechanism 15 for an adjusting angle of rotation of the massage mechanism 10 so that, when the device is in an upper position, an upper end of the massage member 17 protrudes forward, whereas, in a lower position, a lower end thereof protrudes forward.

Abstract: A massage chair with a foot massaging device, which includes a seat unit, a backrest unit, and the foot massaging device located at a front portion of the seat unit, can make the structure simpler, the weight lighter, and the cost lower all at once. The massage chair is provided under the seat unit 2 with a back-and-forth motion mechanism 15 joined to the foot massaging device 5, and when the back-and-forth motion mechanism 15 protrudes forward, the foot massaging device 5 advances to a using position U which is located in front of the seat unit 2 and at which a lower leg of a user can be massaged, while when the back-and-forth motion mechanism 15 retracts backward, the foot massaging device 5 is housed in a housing position P formed under the seat unit 2.

Abstract: An objective is to perform a leg massage under appropriate temperature conditions. The lower leg massage apparatus 1 comprises: a pair of right and left insertion recesses 4,4 in a vertically-extending continuous form, into which are inserted feet F and calves C of a user; a first massage mechanism 5 disposed within an upper part of the insertion recess 4, for massaging the inserted calves C, and a second massage mechanism 7 disposed within a lower part of the insertion recess 4, for massaging the inserted feet F. Further provided are a cover body 12 of a two-layer structure which is disposed in the insertion recess 4 so as to cover the first massage mechanism 5 and the second massage mechanism 7, and a warm air/cool air supply section 15 for supplying a warm or cool current of air to a region between the two layers constituting the cover body 12.

Abstract: A single-phase input including transistors all of which have only a single type of channel polarity, which buffer includes: a buffer section 32, including a first series circuit formed by two n-channel transistors connected to each other in series, a second series circuit formed by two n-channel transistors connected to each other in series at a connection point OUT, and a capacitor; and an inverted-signal generating section for generating an inverted-signal from an input signal, the inverted-signal generating section including n-channel transistors but no p-channel transistor, the input signal being inputted to respective gates of the transistors, the inverted-signal being inputted to a gate of the transistor 4, and an output signal being outputted via the connection point OUT. With the buffer, it is possible that a consumption current be reduced and a current drive for a load is enhanced.

Abstract: In one embodiment of the present invention, a signal process circuit in accordance with the present invention includes: a first input terminal via which an input signal is supplied; a second input terminal via which a predetermined signal is supplied; a cross-coupled inverter circuit, including first and second CMOS inverter circuits, in which an input of the first CMOS inverter circuit and an output of the second CMOS inverter circuit are interconnected to each other and an output of the first CMOS inverter circuit and an input of the second CMOS inverter circuit are interconnected to each other; a current control circuit that applies currents to the first and second CMOS inverter circuits in accordance with a timing signal, the input signal, and the predetermined signal; output terminals which are connected to the outputs of the first and second CMOS inverter circuits, respectively, and from which an output signal is supplied; and a reset circuit that resets the output signal based on the timing signal.

Abstract: In one embodiment of the present invention, a unit circuit of a shift register includes a bootstrap circuit configured with a transistor T1, a transistor T2 and a capacitor, a transistor T3, a transistor T4, and a reset signal generation circuit. By use of two-phase clock signals whose high level periods do not overlap with each other, the reset signal generation circuit generates a reset signal which is at a high level in a normal state and changes to a low level when an input signal turns into the high level. During a period that the reset signal is at the high level, transistors perform discharge of a node and pull-down of an output signal. Thus, it is possible to obtain a shift register which performs discharge of a node and pull-down of an output signal and achieves a small area and low power consumption without using an output signal from a subsequent circuit.

Abstract: In one embodiment of the present invention, a unit circuit of a shift register includes a bootstrap circuit configured with a transistor T1, a transistor T2 and a capacitor, a transistor T3, a transistor T4, and a reset signal generation circuit. By use of two-phase clock signals and whose high level periods do not overlap with each other, the reset signal generation circuit generates a reset signal which is at a high level in a normal state and changes to a low level when an input signal turns into the high level. During a period that the reset signal is at the high level, transistors T3 and T4 perform discharge of a node and pull-down of an output signal. Thus, it is possible to obtain a power-saving shift register that fixes an output signal at a low level in a normal state without allowing a through current to flow therein.

Abstract: In one embodiment of the invention, a capacitor is provided between a node and a negative-side input terminal of a differential amplifier. A switch SW11 is provided between the negative-side input terminal and an output terminal of the differential amplifier. A switch SW12 is provided between the node and the output terminal of the differential amplifier. Switches SW13 to SW16 are provided for switching between a voltage of the node and a positive-side input voltage of the differential amplifier. The switches SW11 and SW12 are on during different periods. In a positive polarity mode, the switches SW13 and SW16 are when the switch SW11 is on while the switch SW16 is on when the switch SW12 is on. In a negative polarity mode, the switches SW14 and SW15 are on when the switch SW11 is on while the switch SW16 is on when the switch SW12 is on. Thus, two types of gradation voltages each required for AC drive of a liquid crystal can be generated with a small circuit scale.

Abstract: In one embodiment of the present application, during an initial setting period, switches are rendered conductive, so that voltage on a signal line becomes equal to a source voltage, and input voltages of inverters become equal to a logic threshold voltage. During a writing period, other switches are rendered conductive, and the inverters serve as amplifiers. The last-stage inverter is made up of a P-type Tr14, and an N-type Tr15 having a lower current drive capability than the P-type Tr14. At the beginning of the writing period, the voltage on the signal line varies due to current flowing through the P-type Tr14, and therefore the rate of change of the voltage on the signal line does not change by reducing the current drive capability of the N-type Tr15.

Abstract: A display panel driving circuit includes a plurality of circuit blocks g aligned in a row direction, in each of which an upstream circuit and a downstream circuit are included and signal transmission is carried out between the upstream circuit and the downstream circuit that belong to one and the same circuit block. In each of the plurality of circuit blocks, the upstream circuit and the downstream circuit are aligned in the column direction. A inter-block common wiring Q is provided for every two circuit blocks. Signal transmission in one (g1) of the two circuit blocks and signal transmission in the other (g2) of the two circuit blocks are carried out with the inter-block common wiring Q1 at respective timings that are different from each other. Without an external memory or an operational circuit, this allows the area of the display panel driving circuit (driver) to be reduced.

Abstract: While an output signal of a flip-flop is inactive in a shift register, NAND circuits of clock pulse extracting sections prevent the performing of conduction switching operation in accordance with periodic level change of clock signals between a logical derivation path for High output and a logical derivation path for Low output, by input of the output signal.

Abstract: In one embodiment of the present invention, a display panel drive circuit includes a plurality of circuit blocks each of which includes former circuits and latter circuits. In each of the circuit blocks in the display panel drive circuit, a signal is transmitted from the former circuits to the latter circuits. Further, the display panel drive circuit includes an inter-block shared wire which allows respective two of the circuit blocks adjacent to each other to be connected to each other. Furthermore, in the display panel drive circuit, the signal of the respective two of the circuit blocks adjacent to each other is transmitted in a time division manner, via the inter-block shared wire. This eliminates the need for an external memory or an arithmetic circuit, thereby making it possible to reduce the area of a circuit in a driver.

Abstract: In one embodiment of the present invention, a voltage source is disclosed including a lower output impedance is connected to a capacitive load via a switch element and a voltage source including a higher output impedance is connected to the capacitive load via a switch element. Until a potential of an output terminal attains a reference potential, a comparator keeps the switch element in an ON state so that the voltage source writes a potential onto the capacitive load. When the potential of the output terminal exceeds the reference potential, the comparator causes the switch element to be in an ON state so that the voltage source writes a potential onto the capacitive load so as to have a predetermined potential.

Abstract: In one embodiment of the present invention, a driving circuit is disclosed of a display device, a connection and disconnection section is provided between an output of an analog amplifier circuit and an input of a digital circuit. The connection and disconnection section breaks an electrical connection between the output of the analog amplifier circuit and the input of the digital circuit until an output voltage of the analog amplifier circuit rises to a target DC level, and makes an electrical connection between the output of the analog amplifier circuit and the input of the digital circuit after the output voltage of the analog amplifier circuit has risen to the target DC level.

Abstract: In one embodiment of the present invention, a signal process circuit in accordance with the present invention includes: a first input terminal via which an input signal is supplied; a second input terminal via which a predetermined signal is supplied; a cross-coupled inverter circuit, including first and second CMOS inverter circuits, in which an input of the first CMOS inverter circuit and an output of the second CMOS inverter circuit are interconnected to each other and an output of the first CMOS inverter circuit and an input of the second CMOS inverter circuit are interconnected to each other; a current control circuit that applies currents to the first and second CMOS inverter circuits in accordance with a timing signal, the input signal, and the predetermined signal; output terminals which are connected to the outputs of the first and second CMOS inverter circuits, respectively, and from which an output signal is supplied; and a reset circuit that resets the output signal based on the timing signal.