Patents by Inventor Shinsuke Fujikawa

Shinsuke Fujikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190362689
    Abstract: An electro-optical device includes a plurality of scan lines, k signal lines, a pixel that is disposed corresponding to each of intersections between the plurality of scan lines and the k signal lines, an image signal circuit configured to sequentially supply the image signal to each of the k signal lines in a horizontal scanning period, a pre-charge circuit configured to supply, in the horizontal scanning period and in a prescribed order, a pre-charge signal to a signal line of the k signal lines to which the image signal circuit has not supplied the image signal yet; and a control circuit configured to set a first supply periodof the k supply periods, during which the image signal is sequentially supplied to each of the k signal lines, to be longer than prescribed supply periods excluding the first supply period of the k supply periods.
    Type: Application
    Filed: May 23, 2019
    Publication date: November 28, 2019
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Shinsuke FUJIKAWA
  • Patent number: 10490154
    Abstract: An electro-optical device includes a control circuit that controls the timing of output of a precharge voltage to a data line, and changes an elapsed time from start of transition of a voltage of a scanning signal G from a selection voltage to a non-selection voltage until an output of the precharge voltage to the data line according to a polarity of a data voltage, the voltage of the scanning signal for selecting one of multiple scanning lines, the selection voltage causing a pixel transistor to turn on, the non-selection voltage causing a pixel transistor to turn off.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: November 26, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Shinsuke Fujikawa
  • Publication number: 20190331972
    Abstract: A liquid crystal apparatus as an electro-optical device includes a TFT including a semiconductor layer and a gate electrode, a scan line electrically connected to the gate electrode and provided in a layer different from a layer where the gate electrode is provided, a capacitance line, and a conductive light shielding film electrically connected to the capacitance line. The light shielding film is provided in a layer between the gate electrode and the scan line, and in a plan view, overlaps with at least a part of a low-concentration drain region of the semiconductor layer.
    Type: Application
    Filed: April 24, 2019
    Publication date: October 31, 2019
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Toru NIMURA, Hiroyuki OIKAWA, Shinsuke FUJIKAWA
  • Publication number: 20190196281
    Abstract: In an element substrate of an electro-optical device, a semiconductor layer of a transistor has an L shape bending to overlap with both a scanning line and a data line. A first light shielding layer overlaps with a lower layer side of the semiconductor layer. A first light shielding wall and a second light shielding wall are provided on both sides of a semiconductor layer portion between a channel region and a second source/drain region (drain region) of the semiconductor layer. The first light shielding wall and the second light shielding wall to which a constant potential is applied prevent the semiconductor layer portion from being electrically affected even when the first light shielding wall and the second light shielding wall come close to the semiconductor layer portion.
    Type: Application
    Filed: December 26, 2018
    Publication date: June 27, 2019
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hiroyuki OIKAWA, Toru NIMURA, Shinsuke FUJIKAWA
  • Publication number: 20190139505
    Abstract: An electrooptic device includes a scan line; data lines; a scan line driving circuit that selects the scan line; a data line driving circuit that supplies data signals to the data lines; a TFT that includes a gate electrode receiving gate signals for selecting the data line and has one end connected to the data line and the other end connected to the data line driving circuit; and a TFT that includes a gate electrode receiving gate signals for selecting the data line and has one end connected to the data line and the other end connected to the data line driving circuit. The gate electrode of the TFT overlaps the data line.
    Type: Application
    Filed: December 14, 2018
    Publication date: May 9, 2019
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Shinsuke FUJIKAWA
  • Patent number: 10212832
    Abstract: Provided is an electro-optical panel including a first area in which a circuit is formed and a first terminal area and a second terminal area that are arranged side-by-side in a Y direction when viewed from the first area. The first terminal area and the second terminal area are each provided with a terminal group including a plurality of terminals arranged in an X direction different from the Y direction, and at least one of wires from the first terminal area to the first area and from the second terminal area to the first area extends from between the first terminal area and the second terminal area and reaches the first area through an area outside of the first terminal area when viewed from a central axis of the electro-optical panel extending in the Y direction.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: February 19, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Shinsuke Fujikawa
  • Patent number: 10192503
    Abstract: An electrooptic device includes a scan line; data lines; a scan line driving circuit that selects the scan line; a data line driving circuit that supplies data signals to the data lines; a TFT that includes a gate electrode receiving gate signals for selecting the data line and has one end connected to the data line and the other end connected to the data line driving circuit; and a TFT that includes a gate electrode receiving gate signals for selecting the data line and has one end connected to the data line and the other end connected to the data line driving circuit. The gate electrode of the TFT overlaps the data line.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: January 29, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Shinsuke Fujikawa
  • Publication number: 20180335658
    Abstract: In an electrooptical device, a plurality of scanning lines extend between a first side of a display region and a scanning line driving circuit. A semiconductor sensor is provided between the scanning line driving circuit and the first side of the display region, the semiconductor sensor including a sensor semiconductor layer which is on the same layer as a semiconductor layer of a pixel transistor. The semiconductor sensor is a diode temperature sensor, and includes a plurality of diode elements (sensor elements) that are disposed along the first side of the display region and electrodes that electrically connect the plurality of diode elements.
    Type: Application
    Filed: May 7, 2018
    Publication date: November 22, 2018
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Shinsuke FUJIKAWA
  • Patent number: 10134511
    Abstract: A resistance element includes a first electro-conductive layer that is formed on a substrate and includes a body portion and a protruding portion protruding from the body portion, and the body portion includes a current path from an input portion to an output portion. The resistance element further includes a second electro-conductive layer that is formed on the first electro-conductive layer via an insulating layer by using a material having a lower resistivity than the first electro-conductive layer. The resistance element further includes a connection portion that is provided to the insulating layer at a position corresponding to the protruding portion and includes a contact hole penetrating from the first electro-conductive layer to the second electro-conductive layer.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: November 20, 2018
    Assignee: Seiko Epson Corporation
    Inventor: Shinsuke Fujikawa
  • Publication number: 20180228037
    Abstract: Provided is an electro-optical panel including a first area in which a circuit is formed and a first terminal area and a second terminal area that are arranged side-by-side in a Y direction when viewed from the first area. The first terminal area and the second terminal area are each provided with a terminal group including a plurality of terminals arranged in an X direction different from the Y direction, and at least one of wires from the first terminal area to the first area and from the second terminal area to the first area extends from between the first terminal area and the second terminal area and reaches the first area through an area outside of the first terminal area when viewed from a central axis of the electro-optical panel extending in the Y direction.
    Type: Application
    Filed: February 1, 2018
    Publication date: August 9, 2018
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Shinsuke FUJIKAWA
  • Patent number: 10001682
    Abstract: An electrooptic device includes a liquid crystal panel as an electrooptic panel, a first terminal group provided on the liquid crystal panel, the first terminal group including a plurality of terminals arranged in an X direction, and a second terminal group provided on the liquid crystal panel at a position separated from the first terminal group in a Y direction different from the X direction, the second terminal group including a plurality of terminals arranged in the X direction at a terminal arrangement pitch different from that of the first terminal group.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: June 19, 2018
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Shinsuke Fujikawa
  • Publication number: 20180158431
    Abstract: An electro-optical device includes a control circuit that controls the timing of output of a precharge voltage to a data line, and changes an elapsed time from start of transition of a voltage of a scanning signal G from a selection voltage to a non-selection voltage until an output of the precharge voltage to the data line according to a polarity of a data voltage, the voltage of the scanning signal for selecting one of multiple scanning lines, the selection voltage causing a pixel transistor to turn on, the non-selection voltage causing a pixel transistor to turn off.
    Type: Application
    Filed: November 22, 2017
    Publication date: June 7, 2018
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Shinsuke FUJIKAWA
  • Patent number: 9747850
    Abstract: To realize a level shift circuit with the small occupation area and capable of performing high-speed operation, a level shift circuit includes an electric potential converting unit that converts a first electric potential of an input signal to a third electric potential and converts a second electric potential of an input signal to a fourth electric potential. A capacitor includes first and second electrodes, the first electrode being electrically connected to the input unit, and the second electrode being electrically connected to an output node of the electric potential converting unit. A buffer unit converts the third and fourth electrical potentials to fifth and sixth electrical potentials, respectively. The capacitor reflects the input signal in the electric potential of the output node of the electric potential converting unit without delay by capacitive coupling, thereby realizing a level shift circuit that is capable of performing high-speed operation.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: August 29, 2017
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Shinsuke Fujikawa
  • Patent number: 9741312
    Abstract: An electro-optical apparatus includes scanning lines; signal lines; pixels; and a drive unit. The signal lines are divided into k signal line groups (k is an integer of two or greater). The drive unit includes a precharging circuit that supplies precharging signals to the signal lines, and an image signal circuit that supplies image signals to the signal lines. The image signal circuit includes k image sequence lines and k groups of switches. The precharging circuit includes k precharging sequence lines and k groups of precharging switches.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: August 22, 2017
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Shinsuke Fujikawa
  • Publication number: 20170186390
    Abstract: An electrooptic device includes a scan line; data lines; a scan line driving circuit that selects the scan line; a data line driving circuit that supplies data signals to the data lines; a TFT that includes a gate electrode receiving gate signals for selecting the data line and has one end connected to the data line and the other end connected to the data line driving circuit; and a TFT that includes a gate electrode receiving gate signals for selecting the data line and has one end connected to the data line and the other end connected to the data line driving circuit. The gate electrode of the TFT overlaps the data line.
    Type: Application
    Filed: December 6, 2016
    Publication date: June 29, 2017
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Shinsuke FUJIKAWA
  • Publication number: 20170184903
    Abstract: An electrooptic device includes a liquid crystal panel as an electrooptic panel, a first terminal group provided on the liquid crystal panel, the first terminal group including a plurality of terminals arranged in an X direction, and a second terminal group provided on the liquid crystal panel at a position separated from the first terminal group in a Y direction different from the X direction, the second terminal group including a plurality of terminals arranged in the X direction at a terminal arrangement pitch different from that of the first terminal group.
    Type: Application
    Filed: December 6, 2016
    Publication date: June 29, 2017
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Shinsuke FUJIKAWA
  • Publication number: 20160284446
    Abstract: A resistance element includes a first electro-conductive layer that is formed on a substrate and includes a body portion and a protruding portion protruding from the body portion, and the body portion includes a current path from an input portion to an output portion. The resistance element further includes a second electro-conductive layer that is formed on the first electro-conductive layer via an insulating layer by using a material having a lower resistivity than the first electro-conductive layer. The resistance element further includes a connection portion that is provided to the insulating layer at a position corresponding to the protruding portion and includes a contact hole penetrating from the first electro-conductive layer to the second electro-conductive layer.
    Type: Application
    Filed: March 2, 2016
    Publication date: September 29, 2016
    Inventor: Shinsuke Fujikawa
  • Publication number: 20160275896
    Abstract: A plurality of signal lines are classified into k signal line groups (where k is an integer equal to or greater than 2). When the k signal line groups are supplied with an image signal during a horizontal scanning period, a driving unit supplies some of the k signal line groups with a precharge signal and subsequently an image signal, and does not supply the remainder of the k signal line groups with the precharge signal and supplies the remainder of the k signal line groups with the image signal.
    Type: Application
    Filed: November 5, 2014
    Publication date: September 22, 2016
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Shinsuke FUJIKAWA, Nariya TAKAHASHI
  • Publication number: 20160035295
    Abstract: To realize a level shift circuit with the small occupation area and capable of performing high-speed operation, a level shift circuit includes an electric potential converting unit that converts a first electric potential of an input signal to a third electric potential and converts a second electric potential of an input signal to a fourth electric potential. A capacitor includes first and second electrodes, the first electrode being electrically connected to the input unit, and the second electrode being electrically connected to an output node of the electric potential converting unit. A buffer unit converts the third and fourth electrical potentials to fifth and sixth electrical potentials, respectively. The capacitor reflects the input signal in the electric potential of the output node of the electric potential converting unit without delay by capacitive coupling, thereby realizing a level shift circuit that is capable of performing high-speed operation.
    Type: Application
    Filed: March 11, 2014
    Publication date: February 4, 2016
    Applicant: Seiko Epson Corporation
    Inventor: Shinsuke FUJIKAWA
  • Publication number: 20150154926
    Abstract: An electro-optical apparatus includes scanning lines; signal lines; pixels; and a drive unit. The signal lines are divided into k signal line groups (k is an integer of two or greater). The drive unit includes a precharging circuit that supplies precharging signals to the signal lines, and an image signal circuit that supplies image signals to the signal lines. The image signal circuit includes k image sequence lines and k groups of switches. The precharging circuit includes k precharging sequence lines and k groups of precharging switches.
    Type: Application
    Filed: November 26, 2014
    Publication date: June 4, 2015
    Inventor: Shinsuke FUJIKAWA