Patents by Inventor Shinsuke Fujiwara

Shinsuke Fujiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120325196
    Abstract: A method for manufacturing a silicon carbide substrate includes the steps of preparing an ingot of single crystal silicon carbide, obtaining a silicon carbide substrate by cutting the ingot, and forming a chamfer portion in a region including an outer peripheral surface of the silicon carbide substrate. In the step of obtaining the silicon carbide substrate, the ingot is cut such that a main surface of the silicon carbide substrate forms an angle of not less than 10° with respect to a {0001} plane.
    Type: Application
    Filed: June 22, 2012
    Publication date: December 27, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kyoko OKITA, Shinsuke Fujiwara
  • Publication number: 20120329245
    Abstract: A method for producing a group III nitride crystal in the present invention includes the steps of cutting a plurality of group III nitride crystal substrates 10p and 10q having a main plane from a group III nitride bulk crystal 1, the main planes 10pm and 10qm having a plane orientation with an off-angle of five degrees or less with respect to a crystal-geometrically equivalent plane orientation selected from the group consisting of {20-21}, {20-2-1}, {22-41}, and {22-4-1}, transversely arranging the substrates 10p and 10q adjacent to each other such that the main planes 10pm and 10qm of the substrates 10p and 10q are parallel to each other and each [0001] direction of the substrates 10p and 10q coincides with each other, and growing a group III nitride crystal 20 on the main planes 10pm and 10qm of the substrates 10p and 10q.
    Type: Application
    Filed: December 28, 2011
    Publication date: December 27, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Koji Uematsu, Hideki Osada, Seiji Nakahata, Shinsuke Fujiwara
  • Publication number: 20120319125
    Abstract: A first single crystal substrate has a first side surface and it is composed of silicon carbide. A second single crystal substrate has a second side surface opposed to the first side surface and it is composed of silicon carbide. A bonding portion connects the first and second side surfaces to each other between the first and second side surfaces. At least a part of the bonding portion is made of particles composed of silicon carbide and having a maximum length not greater than 1 ?m.
    Type: Application
    Filed: June 12, 2012
    Publication date: December 20, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tsutomu HORI, Shin HARADA, Keiji ISHIBASHI, Shinsuke FUJIWARA
  • Publication number: 20120315427
    Abstract: A single crystal silicon carbide substrate has a 4H-polytype crystal structure, has with nitrogen atoms doped as a conduction impurity with an atomic concentration of more than 1×1016/cm3, and has a main surface containing a circle having a diameter of 5 cm. The single crystal silicon carbide substrate includes only one of a facet region and a non-facet region. Thus, variation in nitrogen atom concentration in the single crystal silicon carbide substrate can be suppressed.
    Type: Application
    Filed: May 17, 2012
    Publication date: December 13, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tsutomu HORI, Makoto Sasaki, Taro Nishiguchi, Shinsuke Fujiwara
  • Publication number: 20120308758
    Abstract: A silicon carbide crystal ingot having a surface greater than or equal to 4 inches, having an n-type dopant concentration greater than or equal to 1×1015 atoms/cm3 and less than or equal to 1×1020 atoms/cm3, a metal atom concentration greater than or equal to 1×1014 atoms/cm3 and less than or equal to 1×1018 atoms/cm3, and not exceeding the n-type dopant concentration, and a metal atom concentration gradient less than or equal to 1×1017 atoms/(cm3·mm), a silicon carbide single crystal wafer produced using the ingot, and a method for fabricating the silicon carbide crystal ingot.
    Type: Application
    Filed: May 18, 2012
    Publication date: December 6, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tsutomu HORI, Makoto SASAKI, Taro NISHIGUCHI, Shinsuke FUJIWARA
  • Patent number: 8294245
    Abstract: Affords a GaN single-crystal mass, a method of its manufacture, and a semiconductor device and method of its manufacture, whereby when the GaN single-crystal mass is being grown, and when the grown GaN single-crystal mass is being processed into a substrate or like form, as well as when an at least single-lamina semiconductor layer is being formed onto a single-crystal GaN mass in substrate form to manufacture semiconductor devices, cracking is controlled to a minimum. The GaN single-crystal mass 10 has a wurtzitic crystalline structure and, at 30° C., its elastic constant C11 is from 348 GPa to 365 GPa and its elastic constant C13 is from 90 GPa to 98 GPa; alternatively its elastic constant C11 is from 352 GPa to 362 GPa.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: October 23, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hideaki Nakahata, Shinsuke Fujiwara, Takashi Sakurada, Yoshiyuki Yamamoto, Seiji Nakahata, Tomoki Uemura
  • Publication number: 20120241741
    Abstract: A first single crystal substrate has a first side surface and it is composed of silicon carbide. A second single crystal substrate has a second side surface opposed to the first side surface and it is composed of silicon carbide. A bonding portion connects the first and second side surfaces to each other between the first and second side surfaces, and it is composed of silicon carbide. At least a part of the bonding portion has polycrystalline structure. Thus, a large-sized silicon carbide substrate allowing manufacturing of a semiconductor device with high yield can be provided.
    Type: Application
    Filed: March 14, 2012
    Publication date: September 27, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroki INOUE, Shin Harada, Tsutomu Hori, Shinsuke Fujiwara
  • Publication number: 20120244307
    Abstract: A silicon carbide substrate includes: a base substrate having a diameter of 70 mm or greater; and a plurality of SiC substrates made of single-crystal silicon carbide and arranged side by side on the base substrate when viewed in a planar view. In other words, the plurality of SiC substrates are arranged side by side on and along the main surface of the base substrate. Further, each of the SiC substrates has a main surface opposite to the base substrate and having an off angle of 20° or smaller relative to a {0001} plane.
    Type: Application
    Filed: March 21, 2012
    Publication date: September 27, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tsutomu HORI, Shin Harada, Taro Nishiguchi, Makoto Sasaki, Hiroki Inoue, Shinsuke Fujiwara
  • Patent number: 8253162
    Abstract: The present GaN substrate can have an absorption coefficient not lower than 7 cm?1 for light having a wavelength of 380 nm and light having a wavelength of 1500 nm, an absorption coefficient lower than 7 cm?1 for at least light having a wavelength not shorter than 500 nm and not longer than 780 nm, and specific resistance not higher than 0.02 ?cm. Here, the absorption coefficient for light having a wavelength not shorter than 500 nm and not longer than 780 nm can be lower than 7 cm?1. Thus, a GaN substrate having a low absorption coefficient for light having a wavelength within a light emission wavelength region of a light-emitting device and specific resistance not higher than a prescribed value and being suitable for the light-emitting device is provided.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: August 28, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shinsuke Fujiwara, Toshihiro Kotani, Fumitake Nakanishi, Seiji Nakahata, Koji Uematsu
  • Publication number: 20120164058
    Abstract: There is provided a method for fabricating a gallium nitride crystal with low dislocation density, high crystallinity, and resistance to cracking during polishing of sliced pieces by growing the gallium nitride crystal using a gallium nitride substrate including dislocation-concentrated regions or inverted-polarity regions as a seed crystal substrate. Growing a gallium nitride crystal 79 at a growth temperature higher than 1,100° C. and equal to or lower than 1,300° C. so as to bury dislocation-concentrated regions or inverted-polarity regions 17a reduces dislocations inherited from the dislocation-concentrated regions or inverted regions 17a, thus preventing new dislocations from occurring over the dislocation-concentrated regions or inverted-polarity regions 17a. This also increases the crystallinity of the gallium nitride crystal 79 and its resistance to cracking during the polishing.
    Type: Application
    Filed: February 22, 2012
    Publication date: June 28, 2012
    Inventors: Tomoki UEMURA, Takashi SAKURADA, Shinsuke FUJIWARA, Takuji OKAHISA, Koji UEMATSU, Hideaki NAKAHATA
  • Publication number: 20120122301
    Abstract: A method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in its main surface is more than 0.8 time and less than 1.0 time as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a main surface side of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate, the single crystal film in the composite substrate being an SiC film. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage without crack being produced in a substrate is provided.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 17, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shinsuke FUJIWARA, Koji Uematsu, Yoshiyuki Yamamoto, Issei Satoh
  • Publication number: 20120118222
    Abstract: A method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in its main surface is more than 1.0 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a main surface side of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate, the single crystal film in the composite substrate being an SiC film. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage is provided.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 17, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shinsuke FUJIWARA, Koji Uematsu, Yoshiyuki Yamamoto, Issei Satoh
  • Publication number: 20120118226
    Abstract: Fracture toughness of AlGaN single-crystal substrate is improved and its absorption coefficient reduced. A nitride semiconductor single-crystal substrate has a composition represented by the formula AlxGa1-xN (0?x?1), and is characterized by having a fracture toughness of (1.2?0.7x) MPa•m1/2 or greater and a surface area of 20 cm2, or, if the substrate has a composition represented by the formula AlxGa1-xN (0.5?x?1), by having an absorption coefficient of 50 cm?1 or less in a 350 to 780 nm total wavelength range.
    Type: Application
    Filed: January 13, 2012
    Publication date: May 17, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shinsuke FUJIWARA, Seiji NAKAHATA
  • Patent number: 8168515
    Abstract: A first silicon carbide substrate having a first back-side surface and a second silicon carbide substrate having a second back-side surface are prepared. The first and second silicon carbide substrates are placed so as to expose each of the first and second back-side surfaces in one direction. A connecting portion is formed to connect the first and second back-side surfaces to each other. The step of forming the connecting portion includes a step of forming a growth layer made of silicon carbide on each of the first and second back-side surfaces, using a sublimation method of supplying a sublimate thereto in the one direction.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: May 1, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Makoto Sasaki, Shin Harada, Taro Nishiguchi, Shinsuke Fujiwara, Yasuo Namikawa
  • Patent number: 8147612
    Abstract: There is provided a method for fabricating a gallium nitride crystal with low dislocation density, high crystallinity, and resistance to cracking during polishing of sliced pieces by growing the gallium nitride crystal using a gallium nitride substrate including dislocation-concentrated regions or inverted-polarity regions as a seed crystal substrate. Growing a gallium nitride crystal 79 at a growth temperature higher than 1,100° C. and equal to or lower than 1,300° C. so as to bury dislocation-concentrated regions or inverted-polarity regions 17a reduces dislocations inherited from the dislocation-concentrated regions or inverted regions 17a, thus preventing new dislocations from occurring over the dislocation-concentrated regions or inverted-polarity regions 17a. This also increases the crystallinity of the gallium nitride crystal 79 and its resistance to cracking during the polishing.
    Type: Grant
    Filed: April 24, 2007
    Date of Patent: April 3, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tomoki Uemura, Takashi Sakurada, Shinsuke Fujiwara, Takuji Okahisa, Koji Uematsu, Hideaki Nakahata
  • Publication number: 20120074403
    Abstract: The present invention is to provide GaN crystal growing method for growing a GaN crystal with few stacking faults on a GaN seed crystal substrate having a main surface inclined at an angle of 20° to 90° from the (0001) plane, and also to provide a GaN crystal substrate with few stacking faults. A method for growing a GaN crystal includes the steps of preparing a GaN seed crystal substrate 10 having a main surface 10m inclined at an angle of 20° to 90° from a (0001) plane 10c and growing a GaN crystal 20 on the GaN seed crystal substrate 10. The GaN seed crystal substrate 10 and the GaN crystal 20 have a difference in impurity concentration of 3×1018 cm?3 or less.
    Type: Application
    Filed: May 19, 2011
    Publication date: March 29, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shinsuke Fujiwara, Koji Uematsu, Hideki Osada
  • Publication number: 20120070962
    Abstract: Freestanding III-nitride single-crystal substrates whose average dislocation density is not greater than 5×105 cm?2 and that are fracture resistant, and a method of manufacturing semiconductor devices utilizing such freestanding III-nitride single-crystal substrates are made available. The freestanding III-nitride single-crystal substrate includes one or more high-dislocation-density regions (20h), and a plurality of low-dislocation-density regions (20k) in which the dislocation density is lower than that of the high-dislocation-density regions (20h), wherein the average dislocation density is not greater than 5×105 cm?2. Herein, the ratio of the dislocation density of the high-dislocation-density region(s) (20h) to the average dislocation density is sufficiently large to check the propagation of cracks in the substrate. And the semiconductor device manufacturing method utilizes the freestanding III-nitride single crystal substrate (20p).
    Type: Application
    Filed: January 14, 2011
    Publication date: March 22, 2012
    Inventors: Shinsuke Fujiwara, Seiji Nakahata
  • Publication number: 20120070929
    Abstract: Provided is a method for fabricating a wafer product including an active layer grown on a gallium oxide substrate and allowing an improvement in emission intensity. In step S105, a buffer layer 13 comprised of a Group III nitride such as GaN, AlGaN, or AlN is grown at 600 Celsius degrees on a primary surface 11a of a gallium oxide substrate 11. After the growth of the buffer layer 13, while supplying a gas G2, which contains hydrogen and nitrogen, into a growth reactor 10, the gallium oxide substrate 11 and the buffer layer 13 are exposed to an atmosphere in the growth reactor 11 at 1050 Celsius degrees. A Group III nitride semiconductor layer 15 is grown on the modified buffer layer. The modified buffer layer includes, for example, voids. The Group III nitride semiconductor layer 15 can be comprised of GaN and AlGaN. When the Group III nitride semiconductor layer 15 is formed of these materials, excellent crystal quality is obtained on the modified buffer layer 14.
    Type: Application
    Filed: March 1, 2010
    Publication date: March 22, 2012
    Applicants: KOHA Co., Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Shin Hashimoto, Katsushi Akita, Kensaku Motoki, Shinsuke Fujiwara, Hideaki Nakahata
  • Publication number: 20120070605
    Abstract: An SiC ingot includes a bottom face having 4 sides; four side faces extending from the bottom face in a direction intersecting the direction of the bottom face; and a growth face connected with the side faces located at a side opposite to the bottom face. At least one of the bottom face, the side faces, and the growth face is the {0001} plane, {1-100} plane, {11-20} plane, or a plane having an inclination within 10° relative to these planes.
    Type: Application
    Filed: September 17, 2010
    Publication date: March 22, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Makoto Sasaki, Shin Harada, Taro Nishiguchi, Kyoko Okita, Hiroki Inoue, Yasuo Namikawa, Shinsuke Fujiwara
  • Publication number: 20120061687
    Abstract: A silicon carbide substrate, which allows for reduced resistivity in the thickness direction thereof while restraining stacking faults from being produced due to heat treatment, includes: a base layer made of silicon carbide; and a SiC layer made of single-crystal silicon carbide and disposed on one main surface of the base layer. The base layer has an impurity concentration greater than 2×1019 cm?3. Further, the SiC layer has an impurity concentration greater than 5×1018 cm?3 and smaller than 2×1019 cm?3.
    Type: Application
    Filed: April 27, 2010
    Publication date: March 15, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Yasuo Namikawa, Shinsuke Fujiwara