Patents by Inventor Shintaro KAMADA

Shintaro KAMADA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11398572
    Abstract: A through-slit is provided in a semiconductor wafer. A first virtual cutting line defines a chip portion including an energy ray sensitive region as viewed from a direction perpendicular to a first main surface. The shortest distance from a second virtual cutting line to the edge of a second semiconductor region is smaller than the shortest distance from the first virtual cutting line to the edge of the second semiconductor region. The through-slit penetrates through the semiconductor wafer in the thickness direction along the second virtual cutting line. A side surface to which a first semiconductor region is exposed is formed in the chip portion by providing the through-slit. A fourth semiconductor region of a first conductivity type is provided on the side surface side of the chip portion by adding impurities to the side surface to which the first semiconductor region is exposed.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: July 26, 2022
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazumasa Kosugi, Shintaro Kamada, Kazuhisa Yamamura
  • Publication number: 20200411702
    Abstract: A through-slit is provided in a semiconductor wafer. A first virtual cutting line defines a chip portion including an energy ray sensitive region as viewed from a direction perpendicular to a first main surface. The shortest distance from a second virtual cutting line to the edge of a second semiconductor region is smaller than the shortest distance from the first virtual cutting line to the edge of the second semiconductor region. The through-slit penetrates through the semiconductor wafer in the thickness direction along the second virtual cutting line. A side surface to which a first semiconductor region is exposed is formed in the chip portion by providing the through-slit. A fourth semiconductor region of a first conductivity type is provided on the side surface side of the chip portion by adding impurities to the side surface to which the first semiconductor region is exposed.
    Type: Application
    Filed: September 5, 2018
    Publication date: December 31, 2020
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazumasa KOSUGI, Shintaro KAMADA, Kazuhisa YAMAMURA