Patents by Inventor Shintaro Mori
Shintaro Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8941421Abstract: To provide a semiconductor device provided with a power-on reset circuit that can reliably detect decrease in power-supply voltage. The power-on reset circuit provided on the semiconductor device includes: a first comparison circuit that compares a primary voltage with a reference value; and a second comparison circuit that compares a secondary voltage with the reference value. The power-on reset circuit issues a reset signal based on comparison results of the first and second comparison circuits.Type: GrantFiled: September 25, 2013Date of Patent: January 27, 2015Assignee: Renesas Electronics CorporationInventors: Shigeki Nakamura, Shintaro Mori, Yoshinori Tokioka, Kenji Tokami
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Patent number: 8721495Abstract: A motorized rear derailleur is basically provided with a base member, a movable member, a pulley arrangement, a motor unit and a power limit circuit. The movable member is movably mounted to the base member between a plurality of gear positions. The pulley arrangement is supported by the movable member. The pulley arrangement includes a pulley having a dynamo that generates electrical energy in response to rotation of the pulley. The motor unit is operatively coupled between the base member and the movable member to selectively move the movable member relative to the base member between the gear positions. The motor unit is electrically coupled to the dynamo to selectively receive electrical energy generated by the dynamo. The power limit circuit is electrically coupled between the dynamo and the motor unit.Type: GrantFiled: June 17, 2011Date of Patent: May 13, 2014Assignee: Shimano Inc.Inventors: Satoshi Kitamura, Shintaro Mori
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Publication number: 20140084972Abstract: To provide a semiconductor device provided with a power-on reset circuit that can reliably detect decrease in power-supply voltage. The power-on reset circuit provided on the semiconductor device includes: a first comparison circuit that compares a primary voltage with a reference value; and a second comparison circuit that compares a secondary voltage with the reference value. The power-on reset circuit issues a reset signal based on comparison results of the first and second comparison circuits.Type: ApplicationFiled: September 25, 2013Publication date: March 27, 2014Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Shigeki NAKAMURA, Shintaro MORI, Yoshinori TOKIOKA, Kenji TOKAMI
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Publication number: 20140084983Abstract: The present invention is directed to prevent occurrence of a problem on a withstand voltage in a circuit group which receives supply of an internal power supply voltage. An error amplifier outputs a control voltage obtained by amplifying a difference voltage between a reference voltage and a divided voltage obtained by dividing an internal power supply voltage to an output node. A drive transistor supplies a drive current according to the control voltage of the output node of the error amplifier from an external power supply line to an internal power supply line. When the divided voltage exceeds a predetermined voltage, a clamp circuit changes the control voltage in the direction of decreasing the drive current.Type: ApplicationFiled: September 25, 2013Publication date: March 27, 2014Applicant: Renesas Electronics CorporationInventors: Yoshinori Tokioka, Kenji Tokami, Shintaro Mori, Shigeki Nakamura
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Publication number: 20130145885Abstract: A bicycle generator or a shifting device has a base member, a rotation receiving member and a dynamo. The base member is configured to be mounted only in vicinity of a hub axle. The rotation receiving member is rotatably mounted on the base member and is rotated by a rotational part of a bicycle. The dynamo is coupled to the rotation receiving member to generate electrical energy in response to rotation of the rotation receiving member. In the case of the shifting device, a shifting unit is provided that includes an electric motor and an output member that engages a part of a bicycle hub transmission device.Type: ApplicationFiled: December 9, 2011Publication date: June 13, 2013Applicant: SHIMANO INC.Inventors: Satoshi KITAMURA, Shintaro MORI
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Patent number: 8402664Abstract: An electric control device is provided with a fixed member, a user operating member and a position sensing unit. The fixed member has a bicycle mounting part. The user operating member is movably mounted to the fixed member. The user operating member includes a first magnetic element. The position sensing unit has a rotating member and a position sensor. The position sensor senses a position of the rotating member. The rotating member includes a second magnetic element that rotates the rotating member as the user operating member is moved. At least one of the first and second magnetic elements is configured to generate a magnetic field.Type: GrantFiled: October 28, 2011Date of Patent: March 26, 2013Assignee: Shimano Inc.Inventors: Satoshi Kitamura, Shintaro Mori
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Publication number: 20120322594Abstract: A bicycle chain tensioner device is basically provided with a base member, a pulley and an electrical storage unit. The pulley is supported by the base member. The pulley includes a dynamo that generates electrical energy in response to the pulley being rotated by a bicycle chain. The electrical storage unit is disposed on the base member and electrically coupled to the dynamo to store electrical energy generated by the dynamo.Type: ApplicationFiled: June 17, 2011Publication date: December 20, 2012Applicant: SHIMANO INC.Inventors: Satoshi KITAMURA, Shintaro MORI
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Publication number: 20120322591Abstract: A motorized rear derailleur is basically provided with a base member, a movable member, a pulley arrangement, a motor unit and a power limit circuit. The movable member is movably mounted to the base member between a plurality of gear positions. The pulley arrangement is supported by the movable member. The pulley arrangement includes a pulley having a dynamo that generates electrical energy in response to rotation of the pulley. The motor unit is operatively coupled between the base member and the movable member to selectively move the movable member relative to the base member between the gear positions. The motor unit is electrically coupled to the dynamo to selectively receive electrical energy generated by the dynamo. The power limit circuit is electrically coupled between the dynamo and the motor unit.Type: ApplicationFiled: June 17, 2011Publication date: December 20, 2012Applicant: SHIMANO INC.Inventors: Satoshi KITAMURA, Shintaro MORI
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Patent number: 8163105Abstract: The present invention provides a corrosion inhibition method which minimizes environmental adverse effects by using phosphate base anticorrosives without using zinc salt base anticorrosives and by reducing the concentration of the phosphate base anticorrosives, enables stable formation of an effective initial protective film, and does not affect water treatment after the formation of the initial protective film. In an initial protective film formation process of forming an initial protective film on a surface of an iron-based metallic member of a water system by adding anticorrosives to the water system, at least one selected from a group consisting of pyrophosphoric acids and pyrophosphates is employed as the anticorrosives and the initial protective film formation process is conducted such that the initial pH at the start of the initial protective film formation process is adjusted to be 5 or more and less than 7 so that the pH at the end of the initial protective film formation process becomes 7 or more.Type: GrantFiled: March 22, 2005Date of Patent: April 24, 2012Assignee: Kurita Water Industries Ltd.Inventors: Yutaka Yoneda, Hajime Iseri, Shintaro Mori
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Publication number: 20070197177Abstract: The present invention provides a squelch detecting circuit capable of high-speed transfer while using a reduced number of high-speed operating operational amplifiers to reduce power consumption and the cost of parts. Input differential signals inputted to a differential amplification circuit are amplified and the amplified signal is outputted to a gain proportion circuit. The gain proportion circuit supplies a potential holding circuit with a potential proportional to the amplified signal. The potential holding circuit holds the potential supplied from the gain proportion circuit. A comparator circuit compares the potential held by the potential holding circuit with a reference potential to decide whether it is a squelch state or a non-squelch state and outputs the result as a detect signal.Type: ApplicationFiled: April 16, 2007Publication date: August 23, 2007Applicant: Renesas Technology Corp.Inventors: Danichi Komatsu, Shintaro Mori
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Patent number: 7218903Abstract: The present invention provides a squelch detecting circuit capable of high-speed transfer while using a reduced number of high-speed operating operational amplifiers to reduce power consumption and the cost of parts. Input differential signals inputted to a differential amplification circuit are amplified and the amplified signal is outputted to a gain proportion circuit. The gain proportion circuit supplies a potential holding circuit with a potential proportional to the amplified signal. The potential holding circuit holds the potential supplied from the gain proportion circuit. A comparator circuit compares the potential held by the potential holding circuit with a reference potential to decide whether it is a squelch state or a non-squelch state and outputs the result as a detect signal.Type: GrantFiled: September 8, 2004Date of Patent: May 15, 2007Assignee: Renesas Technology Corp.Inventors: Danichi Komatsu, Shintaro Mori
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Patent number: 7148567Abstract: A semiconductor integrated circuit device has two semiconductor integrated circuit chips (20 and 30) respectively provided with a plurality of PADs (40a–40e, 41a–41e and 42a–42d), a plurality of LEADs (50a–50d) disposed around arrays of the semiconductor integrated circuit chips, and a plurality of bonding wires (60a–60e and 61a–61d). The plurality of bonding wires are connected so as not to straddle one semiconductor integrated circuit chip (30) and allow wiring between the PADs (40a–40e) of the other semiconductor integrated circuit chip (20) and the LEADs (50a–50d).Type: GrantFiled: March 14, 2005Date of Patent: December 12, 2006Assignee: Renesas Technology Corp.Inventors: Yasuo Moriguchi, Shintaro Mori, Fumihiko Terayama, Hirokazu Komoriya
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Publication number: 20050221013Abstract: The present invention provides a corrosion inhibition method which minimizes environmental adverse effects by using phosphate base anticorrosives without using zinc salt base anticorrosives and by reducing the concentration of the phosphate base anticorrosives, enables stable formation of an effective initial protective film, and does not affect water treatment after the formation of the initial protective film. In an initial protective film formation process of forming an initial protective film on a surface of an iron-based metallic member of a water system by adding anticorrosives to the water system, at least one selected from a group consisting of pyrophosphoric acids and pyrophosphates is employed as the anticorrosives and the initial protective film formation process is conducted such that the initial pH at the start of the initial protective film formation process is adjusted to be 5 or more and less than 7 so that the pH at the end of the initial protective film formation process becomes 7 or more.Type: ApplicationFiled: March 22, 2005Publication date: October 6, 2005Applicant: KURITA WATER INDUSTRIES LTDInventors: Yutaka Yoneda, Hajime Iseri, Shintaro Mori
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Publication number: 20050156305Abstract: A semiconductor integrated circuit device has two semiconductor integrated circuit chips (20 and 30) respectively provided with a plurality of PADs (40a-40e, 41a-41e and 42a-42d), a plurality of LEADs (50a-50d) disposed around arrays of the semiconductor integrated circuit chips, and a plurality of bonding wires (60a-60e and 61a-61d). The plurality of bonding wires are connected so as not to straddle one semiconductor integrated circuit chip (30) and allow wiring between the PADs (40a-40e) of the other semiconductor integrated circuit chip (20) and the LEADs (50a-50d).Type: ApplicationFiled: March 14, 2005Publication date: July 21, 2005Inventors: Yasuo Moriguchi, Shintaro Mori, Fumihiko Terayama, Hirokazu Komoriya
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Publication number: 20050054311Abstract: The present invention provides a squelch detecting circuit capable of high-speed transfer while using a reduced number of high-speed operating operational amplifiers to reduce power consumption and the cost of parts. Input differential signals inputted to a differential amplification circuit are amplified and the amplified signal is outputted to a gain proportion circuit. The gain proportion circuit supplies a potential holding circuit with a potential proportional to the amplified signal. The potential holding circuit holds the potential supplied from the gain proportion circuit. A comparator circuit compares the potential held by the potential holding circuit with a reference potential to decide whether it is a squelch state or a non-squelch state and outputs the result as a detect signal.Type: ApplicationFiled: September 8, 2004Publication date: March 10, 2005Inventors: Danichi Komatsu, Shintaro Mori
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Patent number: 6807647Abstract: An IC test system comprises: a test pattern signal applying section for applying a test pattern signal to an IC to be tested, in accordance with a test program; a simulation section for simulating an operation of the test pattern signal applying section in accordance with a simulation program; and a management device which is connected detachably with the test pattern signal applying section, for managing the operation of the test pattern signal applying section and an operation of the simulation section in accordance with a management program, for storing information about each operation of the test pattern signal applying section and the simulation section, and for managing one of the information about the operation of the simulation section and the information about the operation of the test pattern signal applying section in accordance with the other information.Type: GrantFiled: September 5, 2001Date of Patent: October 19, 2004Assignee: Ando Electric Co., Ltd.Inventor: Shintaro Mori
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Patent number: 6674623Abstract: In a microcomputer equipped with a built-in temperature sensor, diodes as a temperature sensor are incorporated in a pair of circuit blocks, respectively, and placed in opposite polarity connection to each other. When detecting a temperature of the microcomputer, a constant current If is supplied to the diodes through terminals commonly connected to both the diodes. A voltage Vf generated at each diode is read through terminals located at more adjacent nodes to the diode when compared in position with the terminals.Type: GrantFiled: May 24, 2000Date of Patent: January 6, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Toshihiro Abe, Shintaro Mori, Fumihiko Terayama, Masahiro Kitamura, Seiichi Yamazaki, Yasuo Moriguchi
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Publication number: 20030102556Abstract: A semiconductor integrated circuit device has two semiconductor integrated circuit chips (20 and 30) respectively provided with a plurality of PADs (40a-40e, 41a-41e and 42a-42d), a plurality of LEADs (50a-50d) disposed around arrays of the semiconductor integrated circuit chips, and a plurality of bonding wires (60a-60e and 61a-61d). The plurality of bonding wires are connected so as not to straddle one semiconductor integrated circuit chip (30) and allow wiring between the PADs (40a-40e) of the other semiconductor integrated circuit chip (20) and the LEADs (50a-50d).Type: ApplicationFiled: June 4, 2002Publication date: June 5, 2003Inventors: Yasuo Moriguchi, Shintaro Mori, Fumihiko Terayama, Hirokazu Komoriya
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Publication number: 20020049945Abstract: An IC test system comprises: a test pattern signal applying section for applying a test pattern signal to an IC to be tested, in accordance with a test program; a simulation section for simulating an operation of the test pattern signal applying section in accordance with a simulation program; and a management device which is connected detachably with the test pattern signal applying section, for managing the operation of the test pattern signal applying section and an operation of the simulation section in accordance with a management program, for storing information about each operation of the test pattern signal applying section and the simulation section, and for managing one of the information about the operation of the simulation section and the information about the operation of the test pattern signal applying section in accordance with the other information.Type: ApplicationFiled: September 5, 2001Publication date: April 25, 2002Applicant: ANDO ELECTRIC CO., LTDInventor: Shintaro Mori
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Patent number: 4985648Abstract: Respective current supply means (I.sub.A, I.sub.B) control conducting periods of corresponding transistors (Q.sub.3, Q.sub.4), whereby conducting periods of driving transistore (Q.sub.6, Q.sub.7) are also controlled. Thus, periods in which both of the driving transistors (Q.sub.6, Q.sub.7) simultaneously enter ON states are reduced and through current (I.sub.S) flowing to the ground level GND through the driving transistors (Q.sub.6, Q.sub.7) is reduced. A pull-down transistor (Q.sub.8) controls a conducting period of the driving transistor (Q.sub.7), whereby periods in which both of the driving transistors (Q.sub.6, Q.sub.7) simultaneously enter ON states are reduced and the through current (I.sub.S) is reduced.Type: GrantFiled: July 18, 1989Date of Patent: January 15, 1991Assignees: Matsushita Electric Industrial Co. Ltd., Mitsubishi Denki Kabushiki KaishaInventors: Toshiaki Tsuruoka, Masafumi Nakamura, Shintaro Mori