Abstract: According to an embodiment, an information processing apparatus includes a secure OS, a non-secure OS, and a monitor. The monitor is configured to switch between the OSs. The secure OS includes a memory protection setting controller, a processing determination controller, and a secure device access controller. The memory protection setting controller is configured to set a protection address in a memory for each certain processing. The processing determination controller is configured to receive an access type, a physical address of an access destination, and data to be written, acquire a list of processing, and determine a type of processing to be performed. The secure device access controller is configured to receive the access type, the physical address of an access destination, and data to be written, and access a peripheral identified by the physical address.

Abstract: According to an embodiment, an information processing apparatus includes a main processor, a secure operating system (OS) module, a non-secure OS module, a secure monitor memory setting module, a timer, and an address space controller. When receiving a notification of an interrupt from the timer, a secure monitor instructs the secure OS module to execute certain processing. The secure OS module is configured to execute certain processing instructed by the secure monitor and store data of a result of the processing in a first memory area.

Abstract: According to one embodiment, an information processing apparatus includes a processor and a memory. The processor operates in a first state and a second state. The memory includes a first region and a second region. A first program code is written in the second region. The first program code is executed when a call of the function provided by an operation system is invoked. A second program code is written in the first region. The processor executes the second program code to replace a first instruction included in the first program code with a second instruction. The second instruction is for switching the second state and the first state.

Abstract: According to one embodiment, an information processing apparatus includes a processor, a main memory, and a memory controller. The memory controller executes an access restriction for each memory region. A first program decodes a protected program which was encrypted in a secure mode. The first program places the protected program which was decoded in a memory region. A second program executes the protected program in a secure mode. The processor places a code region and a protected data region in the protected program which was decoded in a memory region having an access restriction by using the first program. When an access to the protected data region is confirmed, the processor confirms by using the second program that the access is caused by a command from the code region placed by the first program, and then, executes the command.

Abstract: According to an embodiment, an information processing apparatus includes a main processor, a secure operating system (OS) module, a non-secure OS module, a secure monitor memory setting module, a timer, and an address space controller. When receiving a notification of an interrupt from the timer, a secure monitor instructs the secure OS module to execute certain processing. The secure OS module is configured to execute certain processing instructed by the secure monitor and store data of a result of the processing in a first memory area.

Abstract: According to an embodiment, an information processing apparatus includes a secure OS, a non-secure OS, and a monitor. The monitor is configured to switch between the OSs. The secure OS includes a memory protection setting controller, a processing determination controller, and a secure device access controller. The memory protection setting controller is configured to set a protection address in a memory for each certain processing. The processing determination controller is configured to receive an access type, a physical address of an access destination, and data to be written, acquire a list of processing, and determine a type of processing to be performed. The secure device access controller is configured to receive the access type, the physical address of an access destination, and data to be written, and access a peripheral identified by the physical address.

Abstract: According to one embodiment, an information processing apparatus includes a processor, a main memory, and a memory controller. The memory controller executes an access restriction for each memory region. A first program decodes a protected program which was encrypted in a secure mode. The first program places the protected program which was decoded in a memory region. A second program executes the protected program in a secure mode. The processor places a code region and a protected data region in the protected program which was decoded in a memory region having an access restriction by using the first program. When an access to the protected data region is confirmed, the processor confirms by using the second program that the access is caused by a command from the code region placed by the first program, and then, executes the command.