Patents by Inventor Shinya Hasuo

Shinya Hasuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240085874
    Abstract: An information processing device includes a memory, and a processor configured to execute a process. The process includes acquiring a first controller model, the first controller model including information indicating a control condition based on a measurement value, and information indicating a control action defining an action of a control target when the control condition is satisfied; and outputting a second controller model, the second controller model being capable of tolerating a measurement value including a measurement error, wherein the second controller model includes information indicating a control condition based on the information indicating the control condition included in the first controller model, and information indicating a control action based on the information indicating the control condition and the information indicating the control action included in the first controller model.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Inventors: Tsutomu KOBAYASHI, Rick Salay, Ichiro Hasuo, Krzysztof Czarnecki, Fuyuki Ishikawa, Shinya Katsumata
  • Patent number: 4713562
    Abstract: A Josephson-junction logic circuit comprises at least one Josephson-junction logic gate which has a variable threshold-type superconductive quantum interference element. The Josephson-junction logic gate comprises a superconductive inductance loop, and at least two Josephson junctions included in the superconductive loop. At least two current-injection lines connected to the superconductive loop and at least one magnetically coupled line are provided. The magnetically coupled line is placed so as to be magnetically coupled to the inductance. Because of this construction, the number of inputs can be increased. Also, various logical functions can be obtained. Further, various logic circuits can be formed by simply changing the photomask for the wiring between the gates.
    Type: Grant
    Filed: September 22, 1986
    Date of Patent: December 15, 1987
    Assignee: Fujitsu Limited
    Inventors: Shinya Hasuo, Norio Fujimaki
  • Patent number: 4506172
    Abstract: This invention discloses a decoder circuit utilizing Josephson devices where Josephson AND gates, output lines connecting both terminals of each said Josephson device and an input signal line are provided in as many as 2.sup.n in number in the nth stage of plural stages. The Josephson AND gate turns ON with the logical product (AND) of the current flowing into the output line of said Josephson AND gate of the preceding stage and the current flowing into the input signal line of the pertinent stage and causes a current to flow into the respective output line.
    Type: Grant
    Filed: July 23, 1984
    Date of Patent: March 19, 1985
    Assignee: Fujitsu Limited
    Inventor: Shinya Hasuo
  • Patent number: 4423430
    Abstract: A superconductive logic device incorporating at least one Josephson junction comprises two superconductive electrodes, that is, a base electrode and a counter electrode with a thin insulating layer therebetween. The counter electrode has an extension for receiving an input signal and another extension connected to a ground plane. The input signal current which is supplied from the counter electrode to the ground plane acts on the Josephson junction with a magnetic field, while, a bias current is supplied from the base electrode and flows through the Josephson junction to the ground plane.
    Type: Grant
    Filed: February 20, 1981
    Date of Patent: December 27, 1983
    Assignee: Fujitsu Limited
    Inventors: Shinya Hasuo, Hideo Suzuki