Abstract: There is provided a target detection method and detection device that can detect a target by a simple method and configuration.

Abstract: There are provided a target detection method and detection device that include a calibration function and can maintain detection accuracy of a target irrespectively of a change (such as a temperature) in external environment. A target detection method includes: a step of calculating a quantitative value; a step of, at a first position information generation device, measuring a first target; a step of, at a second position information generation device, measuring a second target; a step of calculating a position of the second target using the first position information generation device as a position reference based on a measurement value of the first target obtained by the first position information generation device, a measurement value of the second target obtained by the second position information generation device, and the quantitative value; and a step of calibrating the quantitative value before measuring a third target using the second position information generation device.

Abstract: There are provided a positioning method and a positioning device that can position workpieces by a simple method and configuration. A positioning method includes: gripping at least one of first and second workpieces; obtaining point group data of the at least one gripped workpiece of the first and second workpieces; calculating a translation matrix of shape fitting point group data obtained by adjusting a position of the point group data to reference data in a position adjustment state of the first and second workpieces; calculating an inverse matrix based on the translation matrix; and positioning the first and second workpieces by moving the at least one gripped workpiece of the first and second workpieces based on at least one of the translation matrix and the inverse matrix.

Abstract: A calibration system that calibrates robots installed in a process includes: a reference measuring element; a flange measuring element attached to a flange provided at an arm tip of each robot; a fixed measuring device configured to measure the flange measuring element of each robot and the reference measuring element; and a controller configured to control the robots, calculate a position and attitude relation between the flange measuring element of each robot and the reference measuring element based on a measured result measured by the fixed measuring device, and calculate an error between a design installation position and attitude of each robot and an actual installation position and attitude of the robot by using the measured position and attitude relation and position and attitude data of the flange measuring element in a robot coordinate system at the time when the robot has been measured by the fixed measuring device.

Abstract: A calibration system that calibrates robots installed in a process includes: a reference measuring element; a flange measuring element attached to a flange provided at an arm tip of each robot; a fixed measuring device configured to measure the flange measuring element of each robot and the reference measuring element; and a controller configured to control the robots, calculate a position and attitude relation between the flange measuring element of each robot and the reference measuring element based on a measured result measured by the fixed measuring device, and calculate an error between a design installation position and attitude of each robot and an actual installation position and attitude of the robot by using the measured position and attitude relation and position and attitude data of the flange measuring element in a robot coordinate system at the time when the robot has been measured by the fixed measuring device.

Abstract: There are provided a semiconductor device in which short circuit failures in magnetic resistor elements and the like are reduced, and a method of manufacturing the same. An interlayer insulating film in which memory cells are formed is formed such that the upper surface of the portion of the interlayer insulating film located in a memory cell region where the magnetic resistor elements are formed is at a position lower than that of the upper surface of the portion of the interlayer insulating film located in a peripheral region. Another interlayer insulating film is formed so as to cover the magnetic resistor elements. In the another interlayer insulating film, formed are bit lines electrically coupled to the magnetic resistor elements. Immediately below the magnetic resistor elements, formed are digit lines.

Abstract: A method for manufacturing a magnetic memory device which includes a TMR element, and the method includes: a step of forming a lower wiring layer; a step of forming an interlayer insulating layer on the lower wiring layer; a step of forming an opening in the interlayer insulating layer so that the lower wiring layer is exposed; a step of forming a barrier metal layer so that the interlayer insulating layer and an inner surface of the opening are covered; a step of forming a metal layer on the barrier metal layer so that the opening is embedded; a polishing step of removing the metal layer on the barrier metal layer through polishing using the barrier metal layer as a stopper so that a wiring layer that includes a metal layer being embedded in the opening and the barrier metal layer is formed; and an element fabricating step of fabricating a TMR element on the wiring layer.

Abstract: To provide a semiconductor device in which the deterioration of the rewrite property is suppressed. In a memory cell region, magnetoresistive elements in a semiconductor magnetic-storage device are formed in an array shape in a mode that the magnetoresistive elements are arranged at portions where digit lines extending in one direction intersect bit lines extending in the direction approximately orthogonal to the digit lines. The digit line and the bit line have such a wiring structure constituted by covering a copper film to be a wiring main body with a cladding layer. One end side of the magnetoresistive element is electrically coupled to the bit line via a top via formed from a non-magnetic material.

Abstract: A method for manufacturing a magnetic memory device which includes a TMR element, and the method includes: a step of forming a lower wiring layer; a step of forming an interlayer insulating layer on the lower wiring layer; a step of forming an opening in the interlayer insulating layer so that the lower wiring layer is exposed; a step of forming a barrier metal layer so that the interlayer insulating layer and an inner surface of the opening are covered; a step of forming a metal layer on the barrier metal layer so that the opening is embedded; a polishing step of removing the metal layer on the barrier metal layer through polishing using the barrier metal layer as a stopper so that a wiring layer that includes a metal layer being embedded in the opening and the barrier metal layer is formed; and an element fabricating step of fabricating a TMR element on the wiring layer.

Abstract: There are provided a semiconductor device in which short circuit failures in magnetic resistor elements and the like are reduced, and a method of manufacturing the same. An interlayer insulating film in which memory cells are formed is formed such that the upper surface of the portion of the interlayer insulating film located in a memory cell region where the magnetic resistor elements are formed is at a position lower than that of the upper surface of the portion of the interlayer insulating film located in a peripheral region. Another interlayer insulating film is formed so as to cover the magnetic resistor elements. In the another interlayer insulating film, formed are bit lines electrically coupled to the magnetic resistor elements. Immediately below the magnetic resistor elements, formed are digit lines.

Abstract: A method for manufacturing a magnetic memory device which includes a TMR element, and the method includes: a step of forming a lower wiring layer; a step of forming an interlayer insulating layer on the lower wiring layer; a step of forming an opening in the interlayer insulating layer so that the lower wiring layer is exposed; a step of forming a barrier metal layer so that the interlayer insulating layer and an inner surface of the opening are covered; a step of forming a metal layer on the barrier metal layer so that the opening is embedded; a polishing step of removing the metal layer on the barrier metal layer through polishing using the barrier metal layer as a stopper so that a wiring layer that includes a metal layer being embedded in the opening and the barrier metal layer is formed; and an element fabricating step of fabricating a TMR element on the wiring layer.

Abstract: A Cu wiring formation method comprises the steps of: forming a Cu film on a wafer by plating; subjecting the Cu film to anticorrosive treatment on the surface thereof after the plating; and annealing the Cu film after the anticorrosive treatment.

Abstract: A plasma processing device include a plasma generation unit for generating plasma by using a cathodic arc discharge, first and second magnetic field ducts arranged in a row for transporting the plasma with one end of the row being connected to the plasma generation unit and a processing chamber connected to the other end of the row unit and having a stage for holding a substrate to be processed. A shutter is provided for covering the plasma during a period of a predetermined time after start of arc discharge or during a period of predetermined time before end of arc discharge. The shutter is disposed between the first magnetic field duct and the substrate to be processed, and is movable. The shutter is capable of being supplied with a voltage, and is kept in a state so as to be electrically insulated from the processing chamber.

Abstract: In the plasma processing device which utilizes a low pressure arc discharge, a method for efficiently capturing and removing electrically charged particles and neutral particles having no charge which are at most 5 &mgr;m in particle diameter is demanded. The electrically charged particles can be captured efficiently by installing an electric field filter in a transportation course of plasma. The electric field filter has a cylindrical structure which is uneven in inner wall shape. A voltage in the range of 10 to 90 V is applied to the electric field filter. The neutral filters can be captured efficiently by installing a neutral filter having an opening sectional area which is at most 40% of a sectional area of the transportation course.

Abstract: A plasma processing device include a plasma generation unit for generating plasma by using a cathodic arc discharge, first and second magnetic field ducts arranged in a row for transporting the plasma with one end of the row being connected to the plasma generation unit and a processing chamber connected to the other end of the row unit and having a stage for holding a substrate to be processed. A shutter is provided for covering the plasma during a period of a predetermined time after start of arc discharge or during a period of predetermined time before end of arc discharge. The shutter is disposed between the first magnetic field duct and the substrate to be processed, and is movable. The shutter is capable of being supplied with a voltage, and is kept in a state so as to be electrically insulated from the processing chamber.