Patents by Inventor Shinya Inoue
Shinya Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240326283Abstract: Supporting tables 8, 9 for supporting both edges 90a, 90b of a veneer 90 are arranged when both edges 90a, 90b are scarfed using circular saws 40a, 41a. Supporting tables 8, 9 include pressing units 56, 57 for pressing both edges 90a, 90b, circular saw contacting sections 54, 55 for receiving the circular saws 40a, 41a, and auxiliary conveyors 60, 62 for transporting both edges 90a, 90b in a transporting direction TD. Pressing units 56, 57 are configured to press both edges 90a, 90b against at least the auxiliary conveyors 60, 62. Auxiliary conveyors 60, 62 are arranged adjacent to the circular saw contacting sections 54, 55. Both edges 90a, 90b transported in the transporting direction TD are pressed by the pressing units 56, 57, reducing a friction acting on both edges 90a, 90b in the direction opposite to the transporting direction TD.Type: ApplicationFiled: February 10, 2022Publication date: October 3, 2024Applicant: MEINAN MACHINERY WORKS, INC.Inventors: Shinya INOUE, Michito NINOMIYA, Yasuhiro KOIKE
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Publication number: 20240083444Abstract: A contact state determination apparatus to be applied to a vehicle includes right and left frame lateral acceleration sensors, a vehicle compartment acceleration sensor, and a contact state determination processor. The contact state determination processor is configured to determine a contact state of the vehicle, based on outputs of the right and left frame lateral acceleration sensors and the vehicle compartment acceleration sensor. The contact state determination processor is configured to determine that the contact state is an oblique contact when: the right and left frame lateral acceleration sensors detect the lateral acceleration rates that are in a same direction and are greater than or equal to a predetermined value; and the longitudinal acceleration rate detected by the vehicle compartment acceleration sensor or an integrated value of the longitudinal acceleration rate is greater than or equal to a predetermined oblique contact determination value.Type: ApplicationFiled: August 25, 2023Publication date: March 14, 2024Inventor: Shinya INOUE
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Publication number: 20230382004Abstract: Scarf faces 92a, 92b are machined at a heeling angle ?2 on a veneer 90 by adjusting the heeling angle ?2 for a desired camber h using the following Equation (1): h = R 2 · sin ? ? 2 - sin 2 ? ? 2 · R 2 - t 2 ( 1 + i 2 ) 4 ( 1 ) With the configuration, double cutting of the veneer 90 by a circular saw 20 can be effectively prevented. Since the camber h is set desirably, the risk can be reduced that the scarf faces 92a, 92b only partially join each other, and a space can be secured to retain an adhesive Ad between arc concavities 91, 91. Thus, when the veneers 90 are joined together at the scarf faces 92a, 92b, the adhesive Ad is unlikely to seep out onto the surfaces of the veneers 90. As a result, the scarf faces 92a, 92b can be properly joined together.Type: ApplicationFiled: November 9, 2021Publication date: November 30, 2023Applicant: MEINAN MACHINERY WORKS, INC.Inventors: Shinya INOUE, Michito NINOMIYA, Yasuhiro KOIKE
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Patent number: 10723686Abstract: An object of the present invention is to provide a powder of high-purity 1,4-cyclohexanedicarboxylic acid with excellent powder flowability. The invention provides a powder of high-purity 1,4-cyclohexanedicarboxylic acid having particle size distributions (volume basis) such that D10 is within a range of 5 to 55 ?m, D50 is within a range of 40 to 200 ?m, and D90 is within a range of 170 to 800 ?m; and having an aerated bulk density of 0.4 to 0.8 g/cm3, a packed bulk density of 0.5 to 1.0 g/cm3, and a compressibility of 10 to 23%.Type: GrantFiled: March 8, 2017Date of Patent: July 28, 2020Assignee: NEW JAPAN CHEMICAL CO., LTD.Inventors: Shinya Inoue, Yoshihiro Ishibashi, Kango Fujitani
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Publication number: 20190059578Abstract: An interlocking block is configured to be assembled with another interlocking block having the same shape and the same size, and has a base in the shape of a pillar extending in a predetermined direction which has a surface formed with a pair of cutouts in bilateral symmetry. The width and the thickness of an end surface 16 are the same. When the width of the end surface is W, the length of the surface in the predetermined direction is 6W, and the distance from the end surface to one of the pair of cutouts is W, and the length of the cutout is W, and the depth of the cutout is W/2.Type: ApplicationFiled: February 23, 2017Publication date: February 28, 2019Inventor: Shinya INOUE
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Publication number: 20190016661Abstract: An object of the present invention is to provide a powder of high-purity 1,4-cyclohexanedicarboxylic acid with excellent powder flowability. The invention provides a powder of high-purity 1,4-cyclohexanedicarboxylic acid having particle size distributions (volume basis) such that D10 is within a range of 5 to 55 ?m, D50 is within a range of 40 to 200 ?m, and D90 is within a range of 170 to 800 ?m; and having an aerated bulk density of 0.4 to 0.8 g/cm3, a packed bulk density of 0.5 to 1.0 g/cm3, and a compressibility of 10 to 23%.Type: ApplicationFiled: March 8, 2017Publication date: January 17, 2019Applicant: NEW JAPAN CHEMICAL CO., LTD.Inventors: Shinya Inoue, Yoshihiro Ishibashi, Kango Fujitani
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Patent number: 10115735Abstract: A semiconductor device includes a silicon surface, a titanium silicide layer contacting the silicon surface, a first titanium nitride layer located over the titanium silicide layer, a titanium oxynitride layer contacting the first titanium nitride layer, a second titanium nitride layer contacting the titanium oxynitride layer, and a metal fill layer located over the second titanium nitride layer.Type: GrantFiled: June 8, 2017Date of Patent: October 30, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Fumitaka Amano, Kensuke Ishikawa, Shinya Inoue, Michiaki Sano
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Publication number: 20180247954Abstract: A semiconductor device includes a silicon surface, a titanium silicide layer contacting the silicon surface, a first titanium nitride layer located over the titanium silicide layer, a titanium oxynitride layer contacting the first titanium nitride layer, a second titanium nitride layer contacting the titanium oxynitride layer, and a metal fill layer located over the second titanium nitride layer.Type: ApplicationFiled: June 8, 2017Publication date: August 30, 2018Inventors: Fumitaka Amano, Kensuke Ishikawa, Shinya Inoue, Michiaki Sano
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Patent number: 9902363Abstract: An airbag device includes an airbag body that inflates and deploys between a foot of a seated person and a floor panel of a vehicle. The airbag body includes: a rear inflating portion inflatable rearwardly from a heel of the seated person and upwardly higher than a bottom face of the foot in the inflation and deployment form of the airbag body, and a front inflating portion inflatable forwardly from a toe of the seated person and upwardly higher than a bottom face of the foot in the inflation and deployment form of the airbag body.Type: GrantFiled: March 17, 2015Date of Patent: February 27, 2018Assignee: SUBARU CORPORATIONInventors: Isamu Nagasawa, Shinya Inoue
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Publication number: 20150274114Abstract: An airbag device includes an airbag body that inflates and deploys between a foot of a seated person and a floor panel of a vehicle. The airbag body includes: a rear inflating portion inflatable rearwardly from a heel of the seated person and upwardly higher than a bottom face of the foot in the inflation and deployment form of the airbag body, and a front inflating portion inflatable forwardly from a toe of the seated person and upwardly higher than a bottom face of the foot in the inflation and deployment form of the airbag body.Type: ApplicationFiled: March 17, 2015Publication date: October 1, 2015Inventors: Isamu NAGASAWA, Shinya INOUE
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Patent number: 9099552Abstract: The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N? type semiconductor layer. A source layer including an N? type layer is disposed in a surface portion of the body layer. An N? type drift layer is formed in a surface portion of the N? type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.Type: GrantFiled: February 24, 2014Date of Patent: August 4, 2015Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yasuhiro Takeda, Shinya Inoue, Yuzo Otsuru
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Patent number: 8789874Abstract: There is provided a front vehicle body structure. A radiator panel lower is mounted between front ends of side frames, crash boxes at the front ends of the side frames, and a bumper beam between front ends of the crash boxes. The radiator panel lower includes a bracket offset toward the inside in the vehicle width direction from the side frame. Upon an offset front collision, a shock load is absorbed by an axial compression deformation of one of the crash boxes and a drag of the side frames. Upon a full-overlap front collision, the right and left crash boxes are subjected to the axial compression deformation, and the shock load is input to the bracket, thereby bending the side frames. Accordingly, and a sufficient axial compression deformation of the crash boxes is secured, and the shock load is absorbed by the reduction in the drag of the side frames.Type: GrantFiled: March 27, 2012Date of Patent: July 29, 2014Assignees: Fuji Jukogyo Kabushiki Kaisha, Toyota Jidosha Kabushiki KaishaInventors: Jyunya Okamura, Takehisa Tsukada, Kouichi Imamura, Takatomo Watamori, Shinya Inoue
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Publication number: 20140167159Abstract: The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N?-type semiconductor layer. A source layer including an N?-type layer is disposed in a surface portion of the body layer. An N? type drift layer is formed in a surface portion of the N?-type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.Type: ApplicationFiled: February 24, 2014Publication date: June 19, 2014Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yasuhiro Takeda, Shinya Inoue, Yuzo Otsuru
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Patent number: 8698236Abstract: The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N?? type semiconductor layer. A source layer including an N? type layer is disposed in a surface portion of the body layer. An N? type drift layer is formed in a surface portion of the N?? type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.Type: GrantFiled: November 23, 2011Date of Patent: April 15, 2014Assignee: Semiconductor Components Industries, LLCInventors: Yasuhiro Takeda, Shinya Inoue, Yuzo Otsuru
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Patent number: 8692330Abstract: A semiconductor device equally turns on the parasitic bipolar transistors in the finger portions of the finger form source and drain electrodes when a surge voltage is applied, even with the P+ type contact layer surrounding the N+ type source layers and the N+ type drain layers connected to the finger form source and drain electrodes. A P+ type contact layer surrounds N+ type source layers and N+ type drain layers. Metal silicide layers are formed on the N+ type source layers, the N+ type drain layers, and a portion of the P+ type contact layer. Finger form source electrodes, finger form drain electrodes, and a P+ type contact electrode surrounding these finger form electrodes are formed, being connected to the metal silicide layers respectively through contact holes formed in an interlayer insulation film deposited on the metal silicide layers.Type: GrantFiled: June 21, 2012Date of Patent: April 8, 2014Assignee: Semiconductor Components Industries, LLCInventors: Yuzo Otsuru, Yasuhiro Takeda, Shigeyuki Sugihara, Shinya Inoue
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Publication number: 20120326235Abstract: A semiconductor device equally turns on the parasitic bipolar transistors in the finger portions of the finger form source and drain electrodes when a surge voltage is applied, even with the P+ type contact layer surrounding the N+ type source layers and the N+ type drain layers connected to the finger form source and drain electrodes. A P+ type contact layer surrounds N+ type source layers and N+ type drain layers. Metal silicide layers are formed on the N+ type source layers, the N+ type drain layers, and a portion of the P+ type contact layer. Finger form source electrodes, finger form drain electrodes, and a P+ type contact electrode surrounding these finger form electrodes are formed, being connected to the metal silicide layers respectively through contact holes formed in an interlayer insulation film deposited on the metal silicide layers.Type: ApplicationFiled: June 21, 2012Publication date: December 27, 2012Applicant: Semiconductor Components Industries, LLCInventors: Yuzo OTSURU, Yasuhiro Takeda, Shigeyuki Sugihara, Shinya Inoue
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Publication number: 20120248819Abstract: There is provided a front vehicle body structure. A radiator panel lower is mounted between front ends of side frames, crash boxes at the front ends of the side frames, and a bumper beam between front ends of the crash boxes. The radiator panel lower includes a bracket offset toward the inside in the vehicle width direction from the side frame. Upon an offset front collision, a shock load is absorbed by an axial compression deformation of one of the crash boxes and a drag of the side frames. Upon a full-overlap front collision, the right and left crash boxes are subjected to the axial compression deformation, and the shock load is input to the bracket, thereby bending the side frames. Accordingly, and a sufficient axial compression deformation of the crash boxes is secured, and the shock load is absorbed by the reduction in the drag of the side frames.Type: ApplicationFiled: March 27, 2012Publication date: October 4, 2012Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, Fuji Jukogyo Kabushiki KaishaInventors: Jyunya OKAMURA, Takehisa Tsukada, Kouichi Imamura, Takatomo Watamori, Shinya Inoue
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Publication number: 20120126324Abstract: The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N? type semiconductor layer. A source layer including an N? type layer is disposed in a surface portion of the body layer. An N? type drift layer is formed in a surface portion of the N? type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.Type: ApplicationFiled: November 23, 2011Publication date: May 24, 2012Applicant: Semiconductor Components Industries, LLCInventors: Yasuhiro TAKEDA, Shinya Inoue, Yuzo Otsuru
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Patent number: 7812178Abstract: The present invention relates to an isoquinoline compound represented by the following formula (I), an optically active form thereof, a pharmaceutically acceptable salt thereof, a water adduct thereof, a hydrate thereof and a solvate thereof, as well as an agent for the prophylaxis and/or treatment of a disease caused by hyperreactivity of poly(ADP-ribose)polymerase, containing the compound, and a poly(ADP-ribose)polymerase inhibitor containing the compound. In addition, this compound is useful as an agent for the prophylaxis and/or treatment of cerebral infarction, particularly as an agent for the prophylaxis and/or treatment of acute cerebral infarction. Furthermore, this compound is useful as a prophylactic and/or therapeutic agent that improves neurological symptoms associated with cerebral infarction, particularly acute cerebral infarction. wherein the symbols are the same as defined in the description.Type: GrantFiled: November 3, 2008Date of Patent: October 12, 2010Assignee: Mitsubishi Tanabe Pharma CorporationInventors: Masakazu Fujio, Hiroyuki Satoh, Shinya Inoue, Toshifumi Matsumoto, Yasuhiro Egi
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Publication number: 20090076276Abstract: The present invention relates to an isoquinoline compound represented by the following formula (I), an optically active form thereof, a pharmaceutically acceptable salt thereof, a water adduct thereof, a hydrate thereof and a solvate thereof, as well as an agent for the prophylaxis and/or treatment of a disease caused by hyperreactivity of poly(ADP-ribose)polymerase, containing the compound, and a poly(ADP-ribose)polymerase inhibitor containing the compound. In addition, this compound is useful as an agent for the prophylaxis and/or treatment of cerebral infarction, particularly as an agent for the prophylaxis and/or treatment of acute cerebral infarction. Furthermore, this compound is useful as a prophylactic and/or therapeutic agent that improves neurological symptoms associated with cerebral infarction, particularly acute cerebral infarction. wherein the symbols are the same as defined in the description.Type: ApplicationFiled: November 3, 2008Publication date: March 19, 2009Applicant: MITSUBISHI TANABE PHARMA CORPORATIONInventors: Masakazu FUJIO, Hiroyuki SATOH, Shinya INOUE, Toshifumi MATSUMOTO, Yasuhiro EGI