Patents by Inventor Shinya Inoue

Shinya Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230031819
    Abstract: There are provided a positioning method and a positioning device that can position workpieces by a simple method and configuration. A positioning method includes: gripping at least one of first and second workpieces; obtaining point group data of the at least one gripped workpiece of the first and second workpieces; calculating a translation matrix of shape fitting point group data obtained by adjusting a position of the point group data to reference data in a position adjustment state of the first and second workpieces; calculating an inverse matrix based on the translation matrix; and positioning the first and second workpieces by moving the at least one gripped workpiece of the first and second workpieces based on at least one of the translation matrix and the inverse matrix.
    Type: Application
    Filed: July 22, 2022
    Publication date: February 2, 2023
    Inventors: Jun MASUDA, Kenji SHIMIZU, Yuji MORI, Hisao HISHIKAWA, Naofumi MATSUSHITA, Shunsuke TANAKA, Yuki INOUE, Fuminori IMAIZUMI, Junya NAKAMURA, Tomokazu UCHIYAMA, Shinji FUJINO, Motohiro KAKUREYA, Kohei YAGI, Shinya HIRANO, Hitoshi FUJIYAMA
  • Patent number: 11522206
    Abstract: A fuel cell system includes a fuel cell stack of a plurality of power generation cells and an impedance measuring device for measuring the impedance in the fuel cell stack. When stopping the operation of the fuel cell system, a method for stopping the operation of the fuel cell system operates the plurality of power generation cells to generate electric power, until the impedance value becomes equal to or greater than an objective impedance value. After the impedance value has become equal to or greater than the objective impedance value, the operation stopping method still continues the power generation of the multiple power generation cells for a given period of time.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: December 6, 2022
    Assignee: Honda Motor Co., Ltd.
    Inventors: Nobuki Koiwa, Shinya Watanabe, Yuji Matsumoto, Kazuhide Inoue
  • Publication number: 20220361330
    Abstract: A wiring substrate includes a first insulating layer, a first conductor layer, and a plurality of filled vias. The first insulating layer has a first surface and a second surface positioned on a side opposite to the first surface. The first conductor layer is formed on the first surface of the first insulating layer. The plurality of filled vias are formed inside the first insulating layer. The plurality of filled vias each have a structure in which a via hole penetrating the first insulating layer is filled with a metal. The first conductor layer includes a pad. The pad overlaps the plurality of filled vias in a plan view from a thickness direction of the first insulating layer and is connected to the plurality of filled vias.
    Type: Application
    Filed: July 16, 2021
    Publication date: November 10, 2022
    Applicant: Fujikura Ltd.
    Inventors: Naoki Oyaizu, Yusuke Fujita, Toshiaki Inoue, Shinya Kashima
  • Publication number: 20220354435
    Abstract: An electrocardiographic waveform measurement device includes a plurality of electrodes configured to measure an electrocardiographic waveform of a measurement target, a vibration detection unit configured to approach a chest region of the measurement target to detect vibration based on a beat of a heart of the measurement target, and a control unit configured to execute measurement processing for the electrocardiographic waveform. The control unit further executes lead type determination processing for determining, based on a detection result from the vibration detection unit, at least whether the electrocardiographic waveform measured by the measurement processing is an electrocardiographic waveform obtained by chest lead measurement.
    Type: Application
    Filed: June 1, 2022
    Publication date: November 10, 2022
    Inventors: Mitsuru SAMEJIMA, Shinya KODAKA, Hideaki YOSHIDA, Daiki ADACHI, Kosuke INOUE
  • Patent number: 11485345
    Abstract: A vehicle control apparatus, configured to control a vehicle, includes an engine that is configured to drive wheels via a power transmission device. The vehicle control apparatus includes a towing state detector and an engine controller. The towing state detector is configured to detect whether the vehicle is in a towing state. The engine controller is configured to stop the engine in a case where a predetermined engine stopping condition is satisfied during traveling of the vehicle. The engine controller is configured to vary, in a case where the towing state detector detects that the vehicle is in the towing state, the predetermined engine stopping condition to reduce an operational range in which the engine is to be stopped compared with an operational range in a case where the towing state detector does not detect that the vehicle is in the towing state.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: November 1, 2022
    Assignee: SUBARU CORPORATION
    Inventors: Kyousuke Kuroda, Mitsuo Aoki, Yoshitsugu Inoue, Shinya Sagawa, Tomoyuki Yamamuro, Akihito Katsume
  • Patent number: 11469408
    Abstract: Disclosed is an electrode, comprising: a metal foil; an electrode layer formed on at least one surface of the metal foil; and an insulating layer formed on the electrode layer; wherein boundary portion between the insulating layer and the electrode layer is in a state in which a part of the insulating layer engages into a part of the electrode layer, and Ls/L is 1.25 or more, wherein a reference length of a straight line in a direction in which the metal foil extends is taken as L and a boundary length along boundary between the insulating layer and the electrode layer is taken as Ls.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: October 11, 2022
    Assignee: NEC CORPORATION
    Inventors: Shinya Sudo, Kazuhiko Inoue, Noboru Yoshida, Makihiro Otohata
  • Publication number: 20220214295
    Abstract: A switched capacitor circuit includes a first charge-to-voltage converter including a first capacitor to operate in a first period to convert a first charge into a first output voltage. The switched capacitor circuit includes a second charge-to-voltage converter including a second capacitor to operate in a second period to convert a second charge into a second output voltage, the second period being different from the first period. The switched capacitor circuit includes a shield interconnect disposed between the first capacitor and the second capacitor, the shield interconnect having a constant potential.
    Type: Application
    Filed: March 24, 2022
    Publication date: July 7, 2022
    Inventors: Fumihiro INOUE, Shinya OTSUKA, Kosuke YAMAMOTO
  • Patent number: 11370030
    Abstract: A lamination molding apparatus of the present disclosure includes: a recoater head that forms a material powder layer by uniformly spreading metal material powder on a modeling table at a predetermined height; a laser light irradiation device that irradiates the material powder layer with laser light, and heats and melts the material powder to form a sintered layer; and a control device that forms a sintered body, which is an three-dimensional molded object, by repeatedly driving and controlling the recoater head and the laser light irradiation device; the control device reads sintered body data, that is configured by the shape of a base part in which at least a plurality of support members with constricted central portion are arranged continuously and the shape of a main body part which is a final molded product, and drives and controls the laser light irradiation device and the recoater head to form the sintered body.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: June 28, 2022
    Assignee: SODICK CO., LTD.
    Inventors: Satoru Inoue, Soichiro Tanaka, Shinya Moriyama
  • Patent number: 11372363
    Abstract: An image forming apparatus is provided. The image forming apparatus includes an image bearer and a cleaning blade configured to remove toner particles remaining on the image bearer. The cleaning blade includes an elastic member in contact with a surface of the image bearer to remove the toner particles. The elastic member has a Martens hardness of from 3 to 8 N/mm2 when measured by a nanoindentation method with a load of 1 ?N. The toner particles comprise toner base particles and an external additive, and the external additive comprise silica particles. A liberation ratio (Xs) of the silica particles liberated from the toner particles is from 40% to 75% when measured by an ultrasonic vibration method. A proportion (R70) of the silica particles having a volume-based particle diameter of 70 nm or more in the silica particles liberated from the toner particles is from 70% to 90% by number.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: June 28, 2022
    Assignee: RICOH COMPANY, LTD.
    Inventors: Daisuke Inoue, Shinya Nakayama, Yohichi Kitagawa, Takaaki Tawada, Kenji Komito
  • Patent number: 10723686
    Abstract: An object of the present invention is to provide a powder of high-purity 1,4-cyclohexanedicarboxylic acid with excellent powder flowability. The invention provides a powder of high-purity 1,4-cyclohexanedicarboxylic acid having particle size distributions (volume basis) such that D10 is within a range of 5 to 55 ?m, D50 is within a range of 40 to 200 ?m, and D90 is within a range of 170 to 800 ?m; and having an aerated bulk density of 0.4 to 0.8 g/cm3, a packed bulk density of 0.5 to 1.0 g/cm3, and a compressibility of 10 to 23%.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: July 28, 2020
    Assignee: NEW JAPAN CHEMICAL CO., LTD.
    Inventors: Shinya Inoue, Yoshihiro Ishibashi, Kango Fujitani
  • Publication number: 20190059578
    Abstract: An interlocking block is configured to be assembled with another interlocking block having the same shape and the same size, and has a base in the shape of a pillar extending in a predetermined direction which has a surface formed with a pair of cutouts in bilateral symmetry. The width and the thickness of an end surface 16 are the same. When the width of the end surface is W, the length of the surface in the predetermined direction is 6W, and the distance from the end surface to one of the pair of cutouts is W, and the length of the cutout is W, and the depth of the cutout is W/2.
    Type: Application
    Filed: February 23, 2017
    Publication date: February 28, 2019
    Inventor: Shinya INOUE
  • Publication number: 20190016661
    Abstract: An object of the present invention is to provide a powder of high-purity 1,4-cyclohexanedicarboxylic acid with excellent powder flowability. The invention provides a powder of high-purity 1,4-cyclohexanedicarboxylic acid having particle size distributions (volume basis) such that D10 is within a range of 5 to 55 ?m, D50 is within a range of 40 to 200 ?m, and D90 is within a range of 170 to 800 ?m; and having an aerated bulk density of 0.4 to 0.8 g/cm3, a packed bulk density of 0.5 to 1.0 g/cm3, and a compressibility of 10 to 23%.
    Type: Application
    Filed: March 8, 2017
    Publication date: January 17, 2019
    Applicant: NEW JAPAN CHEMICAL CO., LTD.
    Inventors: Shinya Inoue, Yoshihiro Ishibashi, Kango Fujitani
  • Patent number: 10115735
    Abstract: A semiconductor device includes a silicon surface, a titanium silicide layer contacting the silicon surface, a first titanium nitride layer located over the titanium silicide layer, a titanium oxynitride layer contacting the first titanium nitride layer, a second titanium nitride layer contacting the titanium oxynitride layer, and a metal fill layer located over the second titanium nitride layer.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: October 30, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Fumitaka Amano, Kensuke Ishikawa, Shinya Inoue, Michiaki Sano
  • Publication number: 20180247954
    Abstract: A semiconductor device includes a silicon surface, a titanium silicide layer contacting the silicon surface, a first titanium nitride layer located over the titanium silicide layer, a titanium oxynitride layer contacting the first titanium nitride layer, a second titanium nitride layer contacting the titanium oxynitride layer, and a metal fill layer located over the second titanium nitride layer.
    Type: Application
    Filed: June 8, 2017
    Publication date: August 30, 2018
    Inventors: Fumitaka Amano, Kensuke Ishikawa, Shinya Inoue, Michiaki Sano
  • Patent number: 9902363
    Abstract: An airbag device includes an airbag body that inflates and deploys between a foot of a seated person and a floor panel of a vehicle. The airbag body includes: a rear inflating portion inflatable rearwardly from a heel of the seated person and upwardly higher than a bottom face of the foot in the inflation and deployment form of the airbag body, and a front inflating portion inflatable forwardly from a toe of the seated person and upwardly higher than a bottom face of the foot in the inflation and deployment form of the airbag body.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: February 27, 2018
    Assignee: SUBARU CORPORATION
    Inventors: Isamu Nagasawa, Shinya Inoue
  • Publication number: 20150274114
    Abstract: An airbag device includes an airbag body that inflates and deploys between a foot of a seated person and a floor panel of a vehicle. The airbag body includes: a rear inflating portion inflatable rearwardly from a heel of the seated person and upwardly higher than a bottom face of the foot in the inflation and deployment form of the airbag body, and a front inflating portion inflatable forwardly from a toe of the seated person and upwardly higher than a bottom face of the foot in the inflation and deployment form of the airbag body.
    Type: Application
    Filed: March 17, 2015
    Publication date: October 1, 2015
    Inventors: Isamu NAGASAWA, Shinya INOUE
  • Patent number: 9099552
    Abstract: The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N? type semiconductor layer. A source layer including an N? type layer is disposed in a surface portion of the body layer. An N? type drift layer is formed in a surface portion of the N? type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: August 4, 2015
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yasuhiro Takeda, Shinya Inoue, Yuzo Otsuru
  • Patent number: 8789874
    Abstract: There is provided a front vehicle body structure. A radiator panel lower is mounted between front ends of side frames, crash boxes at the front ends of the side frames, and a bumper beam between front ends of the crash boxes. The radiator panel lower includes a bracket offset toward the inside in the vehicle width direction from the side frame. Upon an offset front collision, a shock load is absorbed by an axial compression deformation of one of the crash boxes and a drag of the side frames. Upon a full-overlap front collision, the right and left crash boxes are subjected to the axial compression deformation, and the shock load is input to the bracket, thereby bending the side frames. Accordingly, and a sufficient axial compression deformation of the crash boxes is secured, and the shock load is absorbed by the reduction in the drag of the side frames.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: July 29, 2014
    Assignees: Fuji Jukogyo Kabushiki Kaisha, Toyota Jidosha Kabushiki Kaisha
    Inventors: Jyunya Okamura, Takehisa Tsukada, Kouichi Imamura, Takatomo Watamori, Shinya Inoue
  • Publication number: 20140167159
    Abstract: The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N?-type semiconductor layer. A source layer including an N?-type layer is disposed in a surface portion of the body layer. An N? type drift layer is formed in a surface portion of the N?-type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.
    Type: Application
    Filed: February 24, 2014
    Publication date: June 19, 2014
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yasuhiro Takeda, Shinya Inoue, Yuzo Otsuru
  • Patent number: 8698236
    Abstract: The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N?? type semiconductor layer. A source layer including an N? type layer is disposed in a surface portion of the body layer. An N? type drift layer is formed in a surface portion of the N?? type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: April 15, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Yasuhiro Takeda, Shinya Inoue, Yuzo Otsuru