Patents by Inventor Shinya Jyumonji
Shinya Jyumonji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250096217Abstract: A method of manufacturing a semiconductor composite device includes picking up a composite integrated film from a formation substrate having a formation surface, the composite integrated film being in advance formed on the formation substrate; and bonding in a first bonding process the composite integrated film to a substrate front surface of a circuit board. The composite integrated film includes a base member thin film having a base member first surface and a base member second surface facing each other, one or more penetration parts each penetrating the base member thin film, one or more electrodes each including an electrode surface in a planar shape formed on the base member second surface's side, and an element disposed on the base member first surface. In the first bonding process, the base member second surface of the composite integrated film is bonded to the substrate front surface.Type: ApplicationFiled: December 4, 2024Publication date: March 20, 2025Applicant: Oki Electric Industry Co., Ltd.Inventors: Takuma ISHIKAWA, Takahito SUZUKI, Kenichi TANIGAWA, Hironori FURUTA, Toru KOSAKA, Yusuke NAKAI, Shinya JYUMONJI, Genichiro MATSUO, Chihiro TAKAHASHI, Hiroto KAWADA, Yuuki SHINOHARA
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Patent number: 12191292Abstract: A composite integrated film includes a base member thin film having a base member first surface and a base member second surface facing each other, one or more penetration parts penetrating the base member first surface and the base member second surface of the base member thin film, one or more electrodes each including an electrical path part formed between the base member first surface and the base member second surface via the penetration part and an electrode surface in a planar shape formed on the base member second surface's side, and one or more elements provided on the base member first surface of the base member thin film and electrically connected to the electrodes, wherein the electrode surface and the base member second surface form a same flat surface.Type: GrantFiled: October 18, 2021Date of Patent: January 7, 2025Assignee: Oki Electric Industry Co., Ltd.Inventors: Takuma Ishikawa, Takahito Suzuki, Kenichi Tanigawa, Hironori Furuta, Toru Kosaka, Yusuke Nakai, Shinya Jyumonji, Genichiro Matsuo, Chihiro Takahashi, Hiroto Kawada, Yuuki Shinohara
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Publication number: 20230063063Abstract: A light emitting device includes: a first layer in which a first light emitting element is disposed; a second layer stacked on the first layer and including a second light emitting element that at least partially overlaps the first light emitting element as viewed in a light emitting direction perpendicular to a light emitting surface of the first light emitting element; and a control substrate on which the first layer is stacked and that controls light emission of the first light emitting element and the second light emitting element. The first layer includes a first surface facing the second layer in the light emitting direction, a second surface facing the control substrate in the light emitting direction, and a first opening formed from the first surface to the second surface. The second light emitting element and the control substrate are electrically connected together through the first opening.Type: ApplicationFiled: August 10, 2022Publication date: March 2, 2023Applicant: Oki Electric Industry Co., Ltd.Inventors: Takuma ISHIKAWA, Takahito SUZUKI, Kenichi TANIGAWA, Hironori FURUTA, Toru KOSAKA, Yusuke NAKAI, Shinya JYUMONJI, Genichirou MATSUO, Chihiro TAKAHASHI, Hiroto KAWADA, Yuuki SHINOHARA, Akihiro IINO
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Publication number: 20220310817Abstract: A semiconductor element unit includes a semiconductor element; and a first electrode having a flat first electrode mounting surface whose surface roughness is less than or equal to 10 [nm] and forming eutectic bonding with the semiconductor element in a part different from the first electrode mounting surface. A semiconductor element unit supply substrate includes one or more semiconductor element units. A semiconductor packaging circuit includes the semiconductor element unit.Type: ApplicationFiled: December 20, 2021Publication date: September 29, 2022Applicant: Oki Electric Industry Co., Ltd.Inventors: Yuuki SHINOHARA, Takahito SUZUKI, Kenichi TANIGAWA, Hironori FURUTA, Toru KOSAKA, Yusuke NAKAI, Shinya JYUMONJI, Genichirou MATSUO, Takuma ISHIKAWA, Chihiro TAKAHASHI, Hiroto KAWADA
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Patent number: 11450784Abstract: A light-emitting thyristor includes a first semiconductor layer of a P type, a second semiconductor layer of an N type arranged adjacent to the first semiconductor layer; a third semiconductor layer of the P type arranged adjacent to the second semiconductor layer; and a fourth semiconductor layer of the N type arranged adjacent to the third semiconductor layer. A part of the first semiconductor layer is an active layer adjacent to the second semiconductor layer. A dopant concentration of the active layer is higher than or equal to a dopant concentration of the third semiconductor layer. A thickness of the third semiconductor layer is thinner than a thickness of the second semiconductor layer. A dopant concentration of the second semiconductor layer is lower than the dopant concentration of the third semiconductor layer.Type: GrantFiled: June 18, 2020Date of Patent: September 20, 2022Assignee: Oki Electric Industry Co., Ltd.Inventors: Hiroto Kawada, Kenichi Tanigawa, Shinya Jyumonji, Takuma Ishikawa, Chihiro Takahashi
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Publication number: 20220157796Abstract: A composite integrated film includes a base member thin film having a base member first surface and a base member second surface facing each other, one or more penetration parts penetrating the base member first surface and the base member second surface of the base member thin film, one or more electrodes each including an electrical path part formed between the base member first surface and the base member second surface via the penetration part and an electrode surface in a planar shape formed on the base member second surface's side, and one or more elements provided on the base member first surface of the base member thin film and electrically connected to the electrodes, wherein the electrode surface and the base member second surface form a same flat surface.Type: ApplicationFiled: October 18, 2021Publication date: May 19, 2022Applicant: Oki Electric Industry Co., Ltd.Inventors: Takuma ISHIKAWA, Takahito SUZUKI, Kenichi TANIGAWA, Hironori FURUTA, Toru KOSAKA, Yusuke NAKAI, Shinya JYUMONJI, Genichiro MATSUO, Chihiro TAKAHASHI, Hiroto KAWADA, Yuuki SHINOHARA
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Publication number: 20210157253Abstract: A semiconductor device includes a base material and light emitting elements (or LEE) aligned in a first direction on the base material. Among the LEEs, a first LEE is provided with a first semiconductor multilayer structure and a first organic insulating film. Among the LEEs, a second LEE is provided with a second semiconductor multilayer structure and a second organic insulating film. A first multilayer structure width is smaller than a second multilayer structure width that is the first direction width of the second semiconductor multilayer structure, a first multilayer structure thickness is narrower than a second multilayer structure thickness, and a first film thickness is greater than a second film thickness wherein the first film thickness is a thickness of a portion of the first organic insulating film and a second film thickness is a thickness of a portion of the second organic insulating film.Type: ApplicationFiled: November 20, 2020Publication date: May 27, 2021Inventors: Genichirou MATSUO, Hironori FURUTA, Shinya JYUMONJI, Hiroto KAWADA, Kenichi TANIGAWA
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Patent number: 10991849Abstract: A light-emitting thyristor includes a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type arranged adjacent to the first semiconductor layer; a third semiconductor layer of the first conductivity type arranged adjacent to the second semiconductor layer; and a fourth semiconductor layer of the second conductivity type arranged adjacent to the third semiconductor layer. The first semiconductor layer includes an active layer adjacent to the second semiconductor layer, the second semiconductor layer includes a first layer adjacent to the active layer and a second layer arranged between the first layer and the third semiconductor layer, and the first layer has a band gap wider than a band gap of the active layer and a band gap of the second layer.Type: GrantFiled: October 15, 2019Date of Patent: April 27, 2021Assignee: OKI DATA CORPORATIONInventors: Hiroto Kawada, Kenichi Tanigawa, Shinya Jyumonji, Takuma Ishikawa, Chihiro Takahashi
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Publication number: 20200411715Abstract: A light-emitting thyristor includes a first semiconductor layer of a P type, a second semiconductor layer of an N type arranged adjacent to the first semiconductor layer; a third semiconductor layer of the P type arranged adjacent to the second semiconductor layer; and a fourth semiconductor layer of the N type arranged adjacent to the third semiconductor layer. A part of the first semiconductor layer is an active layer adjacent to the second semiconductor layer. A dopant concentration of the active layer is higher than or equal to a dopant concentration of the third semiconductor layer. A thickness of the third semiconductor layer is thinner than a thickness of the second semiconductor layer. A dopant concentration of the second semiconductor layer is lower than the dopant concentration of the third semiconductor layer.Type: ApplicationFiled: June 18, 2020Publication date: December 31, 2020Applicant: Oki Data CorporationInventors: Hiroto KAWADA, Kenichi TANIGAWA, Shinya JYUMONJI, Takuma ISHIKAWA, Chihiro TAKAHASHI
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Publication number: 20200212260Abstract: A light-emitting thyristor includes a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type arranged adjacent to the first semiconductor layer; a third semiconductor layer of the first conductivity type arranged adjacent to the second semiconductor layer; and a fourth semiconductor layer of the second conductivity type arranged adjacent to the third semiconductor layer. The first semiconductor layer includes an active layer adjacent to the second semiconductor layer, the second semiconductor layer includes a first layer adjacent to the active layer and a second layer arranged between the first layer and the third semiconductor layer, and the first layer has a band gap wider than a band gap of the active layer and a band gap of the second layer.Type: ApplicationFiled: October 15, 2019Publication date: July 2, 2020Inventors: Hiroto KAWADA, Kenichi TANIGAWA, Shinya JYUMONJI, Takuma ISHIKAWA, Chihiro TAKAHASHI
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Patent number: 8130253Abstract: A composite semiconductor device is formed of a semiconductor wafer having a plurality of device-forming areas in which semiconductor elements are formed and dicing areas defined between the device-forming areas, and is formed by dicing the semiconductor wafer at the dicing areas. The composite semiconductor device includes a semiconductor substrate, and a plurality of wiring layers layered on the semiconductor substrate. The wiring layers include at least conductive films. Connecting portions are formed to connect the wiring layers with each other in a layering direction of the wiring layers. Each of the connecting portions is disposed on the device-forming area side with respect to a dicing position defined in the dicing area.Type: GrantFiled: May 29, 2009Date of Patent: March 6, 2012Assignee: Oki Data CorporationInventors: Kazuya Ohkawa, Shinya Jyumonji, Masumi Taninaka, Hiroshi Hamano, Masumi Koizumi
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Publication number: 20090322852Abstract: A composite semiconductor device is formed of a semiconductor wafer having a plurality of device-forming areas in which semiconductor elements are formed and dicing areas defined between the device-forming areas, and is formed by dicing the semiconductor wafer at the dicing areas. The composite semiconductor device includes a semiconductor substrate, and a plurality of wiring layers layered on the semiconductor substrate. The wiring layers include at least conductive films. Connecting portions are formed to connect the wiring layers with each other in a layering direction of the wiring layers. Each of the connecting portions is disposed on the device-forming area side with respect to a dicing position defined in the dicing area.Type: ApplicationFiled: May 29, 2009Publication date: December 31, 2009Applicant: Oki Data CorporationInventors: Kazuya Ohkawa, Shinya Jyumonji, Masumi Taninaka, Hiroshi Hamano, Masumi Koizumi