Patents by Inventor Shinya KIYONO

Shinya KIYONO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11552020
    Abstract: A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: January 10, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Koshi Himeda, Tatsuya Kitamura, Chiharu Sakaki, Shinya Kiyono, Sho Fujita, Atsushi Yamamoto, Takeshi Furukawa, Kenji Nishiyama, Tatsuya Funaki, Kinya Aoki
  • Publication number: 20210375841
    Abstract: A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole.
    Type: Application
    Filed: August 10, 2021
    Publication date: December 2, 2021
    Inventors: Koshi Himeda, Tatsuya Kitamura, Chiharu Sakaki, Shinya Kiyono, Sho Fujita, Atsushi Yamamoto, Takeshi Furukawa, Kenji Nishiyama, Tatsuya Funaki, Kinya Aoki
  • Patent number: 11121123
    Abstract: A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: September 14, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Koshi Himeda, Tatsuya Kitamura, Chiharu Sakaki, Shinya Kiyono, Sho Fujita, Atsushi Yamamoto, Takeshi Furukawa, Kenji Nishiyama, Tatsuya Funaki, Kinya Aoki
  • Publication number: 20200321323
    Abstract: A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Koshi Himeda, Tatsuya Kitamura, Chiharu Sakaki, Shinya Kiyono, Sho Fujita, Atsushi Yamamoto, Takeshi Furukawa, Kenji Nishiyama, Tatsuya Funaki, Kinya Aoki
  • Patent number: 10177108
    Abstract: A method of manufacturing an electronic component module and the electronic component module manufactured by the manufacturing method includes bumps, each including a thicker portion having a relatively large thickness and a thinner portion having a relatively small thickness and formed on one surface of the substrate. When looking at the electronic component in a mounted state in a plan view, the thicker portion is positioned on a side of a corresponding outer terminal closer to a center of the electronic component and the thinner portion is positioned on the opposite side of the corresponding outer terminal. In the plan view, joining portions joining the outer terminals respectively to the bumps are formed such that a height of each joining portion on the opposite side is lower than a height of the joining portion on the side closer to the center of the electronic component.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: January 8, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shinya Kiyono, Yoshiaki Satake
  • Patent number: 9860989
    Abstract: An electronic component module formed with the use of a copper particle paste which can ensure that even the inner part of a joint material is sintered, where copper particles are excellent in oxidation resistance, and a joint part is provided with high joint reliability; and a method for manufacturing the module.
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: January 2, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shinya Kiyono, Toshitaka Hayashi, Sho Fujita
  • Publication number: 20170084566
    Abstract: A method of manufacturing an electronic component module and the electronic component module manufactured by the manufacturing method includes bumps, each including a thicker portion having a relatively large thickness and a thinner portion having a relatively small thickness and formed on one surface of the substrate. When looking at the electronic component in a mounted state in a plan view, the thicker portion is positioned on a side of a corresponding outer terminal closer to a center of the electronic component and the thinner portion is positioned on the opposite side of the corresponding outer terminal. In the plan view, joining portions joining the outer terminals respectively to the bumps are formed such that a height of each joining portion on the opposite side is lower than a height of the joining portion on the side closer to the center of the electronic component.
    Type: Application
    Filed: November 16, 2016
    Publication date: March 23, 2017
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinya KIYONO, Yoshiaki SATAKE
  • Patent number: 9532495
    Abstract: A method of manufacturing an electronic component module and the electronic component module manufactured by the manufacturing method includes bumps, each including a thicker portion having a relatively large thickness and a thinner portion having a relatively small thickness and formed on one surface of the substrate. When looking at the electronic component in a mounted state in a plan view, the thicker portion is positioned on a side of a corresponding outer terminal closer to a center of the electronic component and the thinner portion is positioned on the opposite side of the corresponding outer terminal. In the plan view, joining portions joining the outer terminals respectively to the bumps are formed such that a height of each joining portion on the opposite side is lower than a height of the joining portion on the side closer to the center of the electronic component.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: December 27, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shinya Kiyono, Yoshiaki Satake
  • Publication number: 20160338201
    Abstract: An electronic component module formed with the use of a copper particle paste which can ensure that even the inner part of a joint material is sintered, where copper particles are excellent in oxidation resistance, and a joint part is provided with high joint reliability; and a method for manufacturing the module.
    Type: Application
    Filed: August 1, 2016
    Publication date: November 17, 2016
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinya KIYONO, Toshitaka HAYASHI, Sho FUJITA
  • Publication number: 20140049922
    Abstract: A method of manufacturing an electronic component module and the electronic component module manufactured by the manufacturing method includes bumps, each including a thicker portion having a relatively large thickness and a thinner portion having a relatively small thickness and formed on one surface of the substrate. When looking at the electronic component in a mounted state in a plan view, the thicker portion is positioned on a side of a corresponding outer terminal closer to a center of the electronic component and the thinner portion is positioned on the opposite side of the corresponding outer terminal. In the plan view, joining portions joining the outer terminals respectively to the bumps are formed such that a height of each joining portion on the opposite side is lower than a height of the joining portion on the side closer to the center of the electronic component.
    Type: Application
    Filed: October 24, 2013
    Publication date: February 20, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinya KIYONO, Yoshiaki SATAKE