Abstract: A non-aqueous electrolyte secondary cell having high temperature storage characteristics and cycle characteristics is provided. This object is realized by adopting the following configuration. The non-aqueous electrolyte secondary cell includes a positive electrode having a positive electrode active material; a negative electrode having a negative electrode active material; and a non-aqueous electrolyte having a non-aqueous solvent and an electrolyte salt. And the positive electrode active material contains a compound represented by Lia(NibCocMnd)1?x?yWxZryO2 (0.9?a?1.2, 0.3?b?0.6, 0.1?c?0.7, 0?d?0.4, b+c+d=1, 0.001?x?0.05, 0.001?y?0.05); and the non-aqueous electrolyte contains at least one compound selected from the group consisting of cyclohexylbenzene, tert-butylbenzene and tert-amylbenzene in a total concentration of 0.1 to 5% by mass relative to the mass of the non-aqueous electrolyte.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: A splitter circuit in a semiconductor device includes a first inverter that receives an input signal and outputs an inverted signal, a second inverter that receives the inverted signal and outputs a non-inverted signal (a first output signal), a third inverter that receives the input signal and outputs an inverted signal (a second output signal) and an auxiliary inverter that shares an output signal line with the third inverter. The third inverter and the auxiliary inverter use an inverted signal of the input signal as power supplies.

Abstract: An interchannel skew adjustment circuit adjusts signal skew between a first channel and a second channel. The circuit includes a phase adjustment circuit configured to receive a signal of the first channel, delay the signal by a discretely variable delay amount, and output a delayed signal; a channel coupling circuit configured to receive the signal output from the phase adjustment circuit and a signal of the second channel, and detect a phase difference between these two signals; and a controller configured to control the delay amount in the phase adjustment circuit based on a result detected by the channel coupling circuit. This interchannel skew adjustment circuit adjusts the interchannel signal skew only at a sender or a receiver, thereby reducing the circuit area and the power consumption.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: [Problem] To provide a nonaqueous electrolyte secondary battery exhibiting superior stability characteristics and having charge/discharge characteristics exhibiting a high-rate discharge stroke, even when a lithium-nickel-cobalt manganate and a spinel-type lithium manganate are used as the positive electrode active material. [Solution] A mixture having a specific ratio of a tungsten- and zirconium-modified lithium-nickel-cobalt manganate and a spinel-type lithium manganate is used as the positive electrode active material. Furthermore, a nonaqueous electrolyte having a specific ratio of the content of dimethyl carbonate and the content of a cyclic carbonate is used.

Abstract: Disclosed herein is a device that includes first and second buffer circuits connected to a data terminal and a first control circuit controlling the first and second buffer circuits. The first control circuit receives n pairs of first and second internal data signals complementary to each other from 2 n input signal lines and outputs a pair of third and fourth internal data signals complementary to each other to first and second output signal lines, where n is a natural number more than one. The first and second buffer circuits are controlled based on the third and fourth internal data signals such that one of the first and second buffer circuits turns on and the other of the first and second buffer circuits turns off.

Abstract: Disclosed herein is a device that includes first and second buffer circuits electrically connected to a terminal and an output control circuit activating the first buffer circuit and deactivating the second buffer circuit in a first state and activating one of the first and second buffer circuits and deactivating the other of the first and second buffer circuits based on input data in a second state. The output control circuit is brought into one of the first and second states.

Abstract: Disclosed herein is a device that includes a first buffer circuit coupled between a first power supply line and a data terminal and a second buffer circuit coupled between a second power supply line and the data terminal. First and second internal data signals complementary to each other are supplied to a level shifter, thereby third and fourth internal data signals complementary to each other are generated by changing amplitude values of the first and second internal data signals. The first and the second buffer circuits are controlled based on the third and fourth internal data signals such that one of the first and second buffer circuits turns on and the other of the first and second buffer circuits turns off.

Abstract: A splitter circuit in a semiconductor device includes a first inverter that receives an input signal and outputs an inverted signal, a second inverter that receives the inverted signal and outputs a non-inverted signal (a first output signal), a third inverter that receives the input signal and outputs an inverted signal (a second output signal) and an auxiliary inverter that shares an output signal line with the third inverter. The third inverter and the auxiliary inverter use an inverted signal of the input signal as power supplies.

Abstract: To improve cycling characteristics by evening out the battery reaction across different areas of a laminated electrode assembly in a non-aqueous electrolyte secondary-cell battery where the laminated electrode assembly, having tape applied to a top layer, an end face, and a bottom layer thereof, is contained in an outer casing, the tape applied to the periphery of the laminated electrode assembly, configured from a stacked plurality of interleaved separators, cathode plates, and anode plates, extends in the stacking direction across the top layer, end face, and bottom layer of the laminated electrode assembly. Each piece of tape is formed of a base material that is one of styrene-butadiene rubber, styrene rubber, or butadiene rubber.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: Provided is a nonaqueous electrolyte secondary battery. The stacked electrode assembly contains positive electrode plates in which no positive electrode active material layer is formed on at least one side of the positive electrode substrate and negative electrode plates in which no negative electrode active material layer is formed on at least one side of the negative electrode substrate. Such positive electrode surfaces where no positive electrode active material layer is formed are opposed, with a separator interposed, to such negative electrode surfaces where no negative electrode active material layer is formed. The separator interposed between the positive electrode active material layers and negative electrode active material layers has a layer containing ceramic. The separator interposed between the surfaces where no positive electrode active material layer is formed and the surfaces where no negative electrode active material layer is formed has no layer containing ceramic.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: In performing calibration, a control circuit in a calibration circuit of an interface circuit controls a selector so that voltages V1, VREF or voltages V1, V2 are applied to a comparator. The two voltages input to the comparator is switched between positive and negative inputs of the comparator. In both of the states, the control circuit obtains signal values of variable-resistor control signals UPCODE, DNCODE at a time when an output of the comparator is changed, and obtains calibration data to control the resistance value of the terminating resistor by using a mean value of the obtained signal values.

Abstract: A non-aqueous electrolyte secondary cell having high temperature storage characteristics and cycle characteristics is provided. This object is realized by adopting the following configuration. The non-aqueous electrolyte secondary cell includes a positive electrode having a positive electrode active material; a negative electrode having a negative electrode active material; and a non-aqueous electrolyte having a non-aqueous solvent and an electrolyte salt. And the positive electrode active material contains a compound represented by Lia(NibCocMnd)1?x?yWxZryO2 (0.9?a?1.2, 0.3?b?0.6, 0.1?c?0.7, 0?d?0.4, b+c+d=1, 0.001?x?0.05, 0.001?y?0.05); and the non-aqueous electrolyte contains at least one compound selected from the group consisting of cyclohexylbenzene, tert-butylbenzene and tert-amylbenzene in a total concentration of 0.1 to 5% by mass relative to the mass of the non-aqueous electrolyte.

Abstract: The battery charging apparatus has an auxiliary battery 1, a first charging circuit 20 for charging the auxiliary battery 1 with a first charging current derived from an externally connected commercial power source AC, and a second charging circuit 30 for charging the load battery LB with a second charging current that is higher than the first charging current and is derived from power from the auxiliary battery 1, which is charged by the first charging circuit 20. The first charging circuit 20 is connected to allow power supply to the auxiliary battery 1 and the second charging circuit 30. This makes charging circuit switching unnecessary and eliminates the need for components such as high-power switching devices. The charging apparatus has the positive features that stability and reliability are improved, and the load battery can be charged with the auxiliary battery 1 in a shorter time than using commercial power.

Abstract: The present invention provides a nonaqueous electrolyte secondary battery with an excellent packing property and remarkably improved high-temperature cycle characteristics and thermal stability. The nonaqueous electrolyte secondary battery 10 includes a positive electrode plate 11 having a positive electrode active material able to absorb and desorb lithium ions, a negative electrode plate having a negative electrode active material capable of absorption and desorption of lithium ions, and a nonaqueous electrolyte, and the positive electrode active material includes a mixture of material A: LiwNixCoyMnzO2 (where 1.00?w?1.30, x+y+z=1, 0.40?x?0.50, and 0.30?y?0.40) and material B: LiwNixCoyMnzO2 (where 1.00?w?1.30, x+y+z=1, 0.30?x?0.35, and 0.30?y?0.35).