Patents by Inventor Shinya Muraoka
Shinya Muraoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240099497Abstract: A dip-type extraction bag having a bag main body in a planar shape, being formed of a water-permeable filter sheet and filled with an extraction material, wherein the extraction efficiency is improved by providing the body with a specific gripping portion formed from a thin plate-like material and regulating the characteristics of the sheet. The extraction bag includes a bag main body, a thin plate-like member provided on an outer surface thereof, and an extraction material sealed in the bag main body, which is subjected to extraction. The bag main body is a flat bag that has two facing surfaces. The thin plate-like member has a gripping portion that protrudes or is able to protrude from an upper side or the outer surface of the bag main body. The bending resistance (41.5° cantilever method in JIS L 1913:2010 (ISO method)) of the water-permeable filter sheet is 0.09 to 6.0 mN·cm.Type: ApplicationFiled: April 30, 2021Publication date: March 28, 2024Applicant: OHKI CO., LTD.Inventors: Shinya MURAOKA, Ryosuke HAYAMI
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Publication number: 20100240409Abstract: Transmission rate detector (211) detects a transmission rate of uplink data to be transmitted to a wireless base station, compares the detected transmission rate with a preset transmission rate threshold, and outputs the comparison result to transmission power control step generator (212). Based on transmission power control information transmitted from the wireless base station and separated in separator (202) and on the comparison result output from transmission rate detector (211), transmission power control step generator (212) changes the transmission power variation range for controlling the transmission power.Type: ApplicationFiled: October 26, 2006Publication date: September 23, 2010Inventor: Shinya Muraoka
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Patent number: 7792151Abstract: A channel estimation circuit (12) of an individual CH path demodulation unit (1A-1L) performs a channel estimation from an individual CH. A channel estimation value correction circuit (22) of a shared CH path demodulation unit (2A-2L) then corrects a reception power fluctuation due to uplink transmission power control which is caused by the timing offset between the individual CH and the shared CH. The resultant data is used for the demodulation by a shared CH demodulation circuit (23).Type: GrantFiled: February 18, 2005Date of Patent: September 7, 2010Assignee: NEC CorporationInventors: Yasushi Maruta, Satoshi Oura, Shinya Muraoka
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Patent number: 7684819Abstract: A CDMA base station is disclosed that prevents significant increase in the amount of interference within an entire cell even when there exist in the cell mobile stations that perform high-speed packet communication. The CDMA base station comprises a noise estimation circuit, a noise comparator and a TPC bit generating circuit. The noise comparator receives noise power N1 estimated by the noise estimation circuit, compares the noise power N1 with a threshold N2 for interference supplied from packet communication circuit 1 and outputs the result of comparison N3 to the TPC bit generating circuit.Type: GrantFiled: February 10, 2006Date of Patent: March 23, 2010Assignee: NEC CorporationInventor: Shinya Muraoka
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Patent number: 7603116Abstract: A control circuit (1) determines transmission power for a test signal in accordance with the number of call connections of a radio terminal call-connected to the apparatus during a loopback test. The determined transmission power (TSTP) is output to channel circuits (21-2n) used for the transmission of a loopback test signal. The channel circuits (21-2n) adjust the transmission power of the test signal on the basis of the transmission power (TSTP) from the control circuit (1).Type: GrantFiled: November 12, 2003Date of Patent: October 13, 2009Assignees: NEC Corporation, NTT DoCoMo, Inc.Inventor: Shinya Muraoka
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Patent number: 7269437Abstract: A difference between DELAY values of paths is compared and when the difference is below a predetermined value, the paths are assumed to be the same and SIRs estimated for these paths are compared to each other. The SIRs are multiplied by corresponding weighting coefficients and are added in an SIR addition circuit 7. This eliminates erroneous recognition of one path as a plurality of paths, causing an enormous SIR after the addition and prevents deterioration of the line quality.Type: GrantFiled: April 26, 2002Date of Patent: September 11, 2007Assignee: NEC CorporationInventor: Shinya Muraoka
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Publication number: 20070177656Abstract: A channel estimation circuit (12) of an individual CH path demodulation unit (1A-1L) performs a channel estimation from an individual CH. A channel estimation value correction circuit (22) of a shared CH path demodulation unit (2A-2L) then corrects a reception power fluctuation due to uplink transmission power control which is caused by the timing offset between the individual CH and the shared CH. The resultant data is used for the demodulation by a shared CH demodulation circuit (23).Type: ApplicationFiled: February 18, 2005Publication date: August 2, 2007Inventors: Yasushi Maruta, Satoshi Oura, Shinya Muraoka
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Publication number: 20060183496Abstract: A CDMA base station is disclosed that prevents significant increase in the amount of interference within an entire cell even when there exist in the cell mobile stations that perform high-speed packet communication. The CDMA base station comprises a noise estimation circuit, a noise comparator and a TPC bit generating circuit. The noise comparator receives noise power N1 estimated by the noise estimation circuit, compares the noise power N1 with a threshold N2 for interference supplied from packet communication circuit 1 and outputs the result of comparison N3 to the TPC bit generating circuit.Type: ApplicationFiled: February 10, 2006Publication date: August 17, 2006Inventor: Shinya Muraoka
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Publication number: 20060146741Abstract: A control circuit (1) determines transmission power for a test signal in accordance with the number of call connections of a radio terminal call-connected to the apparatus during a loopback test. The determined transmission power (TSTP) is output to channel circuits (21-2n) used for the transmission of a loopback test signal. The channel circuits (21-2n) adjust the transmission power of the test signal on the basis of the transmission power (TSTP) from the control circuit (1).Type: ApplicationFiled: November 12, 2003Publication date: July 6, 2006Inventor: Shinya Muraoka
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Patent number: 7050389Abstract: A DC-offset eliminating circuit changes a coefficient ? for determining a DC-offset follow-up speed. The coefficient ? is changed to a smaller value or 0 in a case where a signal showing a detection that a reception is ceased, is received from a signal-end detecting circuit, or in a case where a signal for partly turning off the circuits for the reduction of power consumption is received from a control circuit, if the received frame is not destined for the receiver itself. The circuit remains the coefficient ? to a smaller value immediately after the reception is resumed. Additionally, the circuit returns the coefficient ? to the normal value in response to the reception of a signal showing that an alignment signal is detected immediately after a preamble portion. The circuit then reduces the DC-offset follow-up speed as much as possible at the time when the preamble portion is received, thereby avoiding the DC-offset deviation caused by the preamble patterns.Type: GrantFiled: January 16, 2001Date of Patent: May 23, 2006Assignee: NEC CorporationInventor: Shinya Muraoka
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Patent number: 7027830Abstract: To implement highly accurate SIR estimation and thereby perform stable transmission power control immediately after starting user communication. A common control circuit has an ISSI value of each sector stored therein. On starting the user communication, the common control circuit outputs to a communication channel circuit for starting the communication the ISSI value corresponding to a sector where the communication is started of the stored ISSI values. The communication channel circuit performs the SIR estimation of a received signal by using the ISSI value and also performs the user communication. The communication channel circuit stores the ISSI value on finishing the communication in the common control circuit in the case where the communication is finished.Type: GrantFiled: November 18, 2002Date of Patent: April 11, 2006Assignee: NEC CorporationInventor: Shinya Muraoka
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Publication number: 20040242254Abstract: A difference between DELAY values of paths is compared and when the difference is below a predetermined value, the paths are assumed to be the same and SIRs estimated for these paths are compared to each other. The SIRs are multiplied by corresponding weighting coefficients and are added in an SIR addition circuit 7. This eliminates erroneous recognition of one path as a plurality of paths, causing an enormous SIR after the addition and prevents deterioration of the line quality.Type: ApplicationFiled: June 23, 2004Publication date: December 2, 2004Inventor: Shinya Muraoka
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Patent number: 6763002Abstract: In order to control the transmission interval of unique words inserted at the top of a plurality of HDLC frames in accordance with the quality of the transmission line, a transmitting and receiving system is provided, in which the transmission interval is changed in accordance with the HDLC responses included in the receiving data. Examples of the HDLC responses includes RR (Receive Ready), RNR (Receive Not Ready), and REJ (Reject).Type: GrantFiled: September 7, 1999Date of Patent: July 13, 2004Assignee: NEC CorporationInventor: Shinya Muraoka
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Patent number: 6580748Abstract: A UW multiplexing circuit multiplexes a fixed pattern over the leading edge of each frame of transmit data. A spreading code generating circuit generates spreading codes TP1 at a timing synchronized with the frame. A spreading circuit spread-modulates data from the UW multiplexing circuit with the spreading codes TP1. A correlation detecting circuit has spread-modulated fixed patterns as multiplication coefficients, and detects correlations between spread-modulated fixed patterns in received data. A despreading code generating circuit supplies, if a fixed pattern is detected, the leading code of despreading codes RP1. A despreading circuit despread-modulates the receive data with the despreading codes RP1. As a result, the spread spectrum communication apparatus according to the invention is capable of setting the code length and the bandwidth expansion factor independent of each other, and thereby enhancing the performance to detect correlated values.Type: GrantFiled: September 13, 1999Date of Patent: June 17, 2003Assignee: NEC CorporationInventor: Shinya Muraoka
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Publication number: 20030095511Abstract: To implement highly accurate SIR estimation and thereby perform stable transmission power control immediately after starting user communication. A common control circuit has an ISSI value of each sector stored therein. On starting the user communication, the common control circuit outputs to a communication channel circuit for starting the communication the ISSI value corresponding to a sector where the communication is started of the stored ISSI values. The communication channel circuit performs the SIR estimation of a received signal by using the ISSI value and also performs the user communication. The communication channel circuit stores the ISSI value on finishing the communication in the common control circuit in the case where the communication is finished.Type: ApplicationFiled: November 18, 2002Publication date: May 22, 2003Applicant: NEC CorporationInventor: Shinya Muraoka
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Publication number: 20010021232Abstract: A DC-offset eliminating circuit changes a coefficient &agr; for determining a DC-offset follow-up speed. The coefficient &agr;, is changed to a smaller value or 0 in a case where a signal showing a detection that a reception is ceased, is received from a signal-end detecting circuit, or in a case where a signal for partly turning off the circuits for the reduction of power consumption is received from a control circuit, if the received frame is not destined for the receiver itself. The circuit remains the coefficient &agr; to a smaller value immediately after the reception is resumed. Additionally, the circuit returns the coefficient &agr; to the normal value in response to the reception of a signal showing that an alignment signal is detected immediately after a preamble portion. The circuit then reduces the DC-offset follow-up speed as much as possible at the time when the preamble portion is received, thereby avoiding the DC-offset deviation caused by the preamble patterns.Type: ApplicationFiled: January 16, 2001Publication date: September 13, 2001Inventor: Shinya Muraoka
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Patent number: 6256510Abstract: In a mobile radio communication apparatus, including a transmission circuit for intermittently transmitting first significant signals and a reception circuit for receiving second significant signals, a control circuit changes a strength of the first significant signals in accordance with a strength of the second significant signals only when the second significant signals are being received by the reception circuit.Type: GrantFiled: September 2, 1998Date of Patent: July 3, 2001Assignee: NEC CorporationInventor: Shinya Muraoka
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Patent number: 6185301Abstract: In an echo canceler, a first adaptive filter circuit calculates first tap coefficients using a first convergence coefficient, and generates a first pseudo echo signal, and a first subtracter subtracts the first pseudo echo signal from a transmitting signal to generate a first error signal. A second adaptive filter circuit calculates second tap coefficients using a second convergence coefficient, and generates a second pseudo echo signal, and a second substrate subtracts the second pseudo echo signal from the transmitting signal to generate a second error signal. A control circuit selects one set of the first tap coefficients and the second tap coefficients in accordance with a received signal, the transmitting signal, and the first and second error signals.Type: GrantFiled: March 2, 1998Date of Patent: February 6, 2001Assignee: NEC CorporationInventor: Shinya Muraoka
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Patent number: 6002950Abstract: A satellite communication apparatus is capable of accurately determining whether there is a received audio signal or not without being affected by ambient conditions, for thereby preventing the characteristics of an adaptive filter from being degraded. A demodulator demodulates a signal received by an antenna, generating synchronizing frame data and a synchronizing frame signal. At this time, the demodulator also generates a synchronization status signal indicating whether the synchronizing frame signal is being generated at a constant period or not. An echo canceler determines whether there is an audio signal or not on based on the synchronization status signal which has been generated by the demodulator and delayed for a given period of time by a delay circuit. Based on the determined result, the echo canceler estimates tap coefficients for generating a quasi-echo signal, and updates the quasi-echo signal.Type: GrantFiled: October 27, 1997Date of Patent: December 14, 1999Assignee: NEC CorporationInventor: Shinya Muraoka
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Patent number: 5862221Abstract: As for wireless communication lines between a master station and a plurality of remote stations, each remote station has a function F having an unitary variable which is known over all the stations and has two unique IDs, respectively. The master station is provided with a remote station ID memory circuit which outputs one ID of a remote station when the other ID of the remote station is input thereto, and a scrambler. carries out scrambling by using a fixed scramble vector VO during a setup sequence period and using a scramble vector VF set from a master station control circuit at the time of data transmission. A descrambler descrambles an input signal from the remote station by using the scramble vector VO during the setup sequence period and using a scramble vector VR set from the master station control circuit at the time of data transmission.Type: GrantFiled: June 27, 1997Date of Patent: January 19, 1999Assignee: NEC CorporationInventor: Shinya Muraoka