Patents by Inventor Shinya Nakaseko

Shinya Nakaseko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030132533
    Abstract: A semiconductor device includes a semiconductor chip, a resin package for sealing said semiconductor chip, metal layers provided on a mounting-side surface of said resin package in an exposed manner and connecting members for electrically connecting electrode pads provided on the semiconductor chip and the metal layers. The metal layers are provided with stud bumps on the mounting side, the stud bumps serving as external connection terminals.
    Type: Application
    Filed: February 25, 2003
    Publication date: July 17, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Toshimi Kawahara, Mamoru Suwa, Masanori Onodera, Syuichi Monma, Shinya Nakaseko, Takashi Hozumi
  • Patent number: 6541848
    Abstract: A semiconductor device includes a semiconductor chip, a resin package for sealing said semiconductor chip, metal layers provided on a mounting-side surface of said resin package in an exposed manner and connecting members for electrically connecting electrode pads provided on the semiconductor chip and the metal layers. The metal layers are provided with stud bumps on the mounting side, the stud bumps serving as external connection terminals.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: April 1, 2003
    Assignee: Fujitsu Limited
    Inventors: Toshimi Kawahara, Mamoru Suwa, Masanori Onodera, Syuichi Monma, Shinya Nakaseko, Takashi Hozumi
  • Publication number: 20020127776
    Abstract: A semiconductor device includes a semiconductor element having a circuit surface on which a projection electrode is formed, a seal resin which seals the circuit surface of the semiconductor element while exposing at least an end part of the projection electrode, a connect surface that is to face a board when the semiconductor device is implemented on the board, a back surface which is opposite to the connect surface, a side surface arranged between the connect surface and the back surface, and an organic material layer formed on the side surface.
    Type: Application
    Filed: October 4, 2001
    Publication date: September 12, 2002
    Applicant: Fujitsu Limited
    Inventors: Shinsuke Nakajo, Norio Fukasawa, Takashi Hozumi, Shinya Nakaseko
  • Publication number: 20020105069
    Abstract: A semiconductor device includes a semiconductor chip, a resin package for sealing said semiconductor chip, metal layers provided on a mounting-side surface of said resin package in an exposed manner and connecting members for electrically connecting electrode pads provided on the semiconductor chip and the metal layers. The metal layers are provided with stud bumps on the mounting side, the stud bumps serving as external connection terminals.
    Type: Application
    Filed: October 13, 1998
    Publication date: August 8, 2002
    Inventors: TOSHIMI KAWAHARA, MAMORU SUWA, MASANORI ONODERA, SYUICHI MONMA, SHINYA NAKASEKO, TAKASHI HOZUMI
  • Patent number: 6329711
    Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding from a mounting surface of the resin package, metallic film parts provided to the resin projections, connecting members electrically connecting electrode pads on the semiconductor element and the metallic film parts, and connection pads extending from the metallic film parts, the connecting members being connected to the connection pads.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: December 11, 2001
    Assignee: Fujitsu Limited
    Inventors: Toshimi Kawahara, Mamoru Suwa, Masanori Onodera, Syuichi Monma, Shinya Nakaseko, Takashi Hozumi, Yoshiyuki Yoneda, Ryuji Nomoto
  • Publication number: 20010045643
    Abstract: A semiconductor device includes an elastic member which has an adhesive contact with at least one other member. The adhesive contact forces said elastic member to stay in a deformed shape different from an original shape to which said elastic member tries to return, wherein a force generated by said elastic member trying to return to the original shape serves to counteract a heat-generated stress applied to said semiconductor device.
    Type: Application
    Filed: March 25, 1999
    Publication date: November 29, 2001
    Inventors: YOSHITSUGU KATOH, SHINYA NAKASEKO, TAKASHI HOZUMI
  • Patent number: 6034428
    Abstract: A semiconductor device includes a semiconductor chip, and a multi-layered member connected to the semiconductor chip. The multi-layered member includes one or a plurality of wiring layers and one or a plurality of insulating layers alternately stacked. The one or the plurality of insulating layers have holes. The multi-layered member has electrode parts which include deformed portions of the above one or the plurality of wiring layers obtained by deforming the above one or the plurality of wiring layers via said holes.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: March 7, 2000
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Toshimi Kawahara, Hiroyuki Ishiguro, Mitsunada Osawa, Shinichirou Taniguchi, Mayumi Osumi, Shinya Nakaseko, Yoshitugu Katoh, Junichi Kasai
  • Patent number: 5844309
    Abstract: An adhesive composition including: a main component comprising a resin material, a solvent for dissolving said main component, and a filler added to said main component, wherein said filler has a particle size so as to make a concavo-convex depth of a surface of said adhesive composition equal to or less than 15 .mu.m after said adhesive composition is applied to an adherend and dried in order to evaporate said solvent before a thermocompression process. The present invention also discloses a semiconductor device using the adhesive composition, an adhering method using the adhesive composition and a method for producing a semiconductor device using the adhesive composition.
    Type: Grant
    Filed: December 3, 1996
    Date of Patent: December 1, 1998
    Assignee: Fujitsu Limited
    Inventors: Yukio Takigawa, Shigeaki Yagi, Toshimi Kawahara, Mitsunada Osawa, Hiroyuki Ishiguro, Shinya Nakaseko, Takashi Hozumi, Masaaki Seki
  • Patent number: 5804467
    Abstract: A semiconductor device includes a substrate having top and bottom surfaces, a semiconductor element mounted on the top surface of the substrate, and a resin package made of a resin and encapsulating the semiconductor element. The substrate includes at least one resin gate hole enabling the resin to be introduced from the bottom surface of the substrate via the resin gate hole when encapsulating the semiconductor element by the resin.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: September 8, 1998
    Assignees: Fujistsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Toshimi Kawahara, Shinya Nakaseko, Mitsunada Osawa, Shinichirou Taniguchi, Mayumi Osumi, Hiroyuki Ishiguro, Yoshitugu Katoh, Junichi Kasai
  • Patent number: 5679978
    Abstract: A semiconductor device includes a substrate having top and bottom surfaces, a semiconductor element mounted on the top surface of the substrate, and a resin package made of a resin and encapsulating the semiconductor element. The substrate includes at least one resin gate hole enabling the resin to be introduced from the bottom surface of the substrate via the resin gate hole when encapsulating the semiconductor element by the resin.
    Type: Grant
    Filed: October 24, 1994
    Date of Patent: October 21, 1997
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Toshimi Kawahara, Shinya Nakaseko, Mitsunada Osawa, Shinichirou Taniguchi, Mayumi Osumi, Hiroyuki Ishiguro, Yoshitugu Katoh, Junichi Kasai