Abstract: A network node is a first network node in a VPLMN (Visited Public land mobile network), the network node including a receiving unit configured to receive information relating to network selection, from a second network node in an HPLMN (Home Public land mobile network); a transmitting unit configured to transmit the information relating to network selection, to a user equipment; and a control unit configured to transmit, to the second network node, a response indicating that the user equipment was unable to receive the information relating to network selection, when a response, with respect to the information relating to network selection transmitted to the user equipment, is not received from the user equipment.

Abstract: A body sheet for a vapor chamber includes a first body surface, a second body surface disposed opposite to the first body surface, and a penetration space extending from the first body surface to the second body surface. The penetration space extends in a first direction in plan view. As seen in a cross section perpendicular to the first direction, the penetration space includes a first opening positioned on the first body surface and a second opening positioned on the second body surface. The second opening extends from a region overlapping with the first opening in plan view to a position overlapping with the first groove in plan view.

Abstract: A user equipment includes a receiving unit configured to receive, from a network node in a VPLMN (Visited Public land mobile network), information indicating a PLMN to be prioritized and information indicating a trigger of PLMN selection; and a control unit configured to execute the PLMN selection, based on the information indicating the PLMN to be prioritized and the information indicating the trigger of the PLMN selection.

Abstract: A watercraft propulsion device includes: a motor driving a propulsion unit; a battery supplying electric power to the motor; and a gas flow passage including one end communicating with the battery and another end communicating with a region that is outside a watercraft hull and is located lower than an upper end of a shell panel disposed at an edge of the watercraft hull, the gas flow passage exhausting a gas ejected from the battery from the other end to outside of the watercraft hull.

Abstract: In 5G cell (230) of 5G system (200), upon detecting that access to the 5G system (200) is barred, the 5G system (200) is congested, 5G core network (220) of the 5G system (200) does not support IMS-type communication service, or fallback to 4G system (300) is instructed, UE (100) selects 4G cell (330) of the 4G system (300) as a target cell for connection. The UE (100) transmits a connection request signal for the IMS-type communication service to the target cell for connection.

Abstract: In a battery abnormality prediction system, an acquisition unit acquires a current flowing through a battery and a temperature of the battery. A prediction unit predicts the occurrence of an abnormality in the battery, based on a relationship between the amount of the current flowing through the battery for a certain period of time and a rise in the temperature of the battery for the certain period of time. The prediction unit may compare the ratio of an integrated amount of current to the temperature rise for the certain period of time with a threshold determined based on data on the battery having caught fire and thereby predict a sign of fire to be caught by the battery.

Abstract: A memory system includes a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, including a history of commands for controlling the memory system. An information processing system includes the memory system and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value. The expected value and the transmitted value are determined based on the log data of the memory system.

Abstract: According to one embodiment, a memory system includes a first chip and a second chip. The second chip is bonded with the first chip. The memory system includes a semiconductor memory device and a memory controller. The semiconductor memory device includes a memory cell array, a peripheral circuit, and an input/output module. The memory controller is configured to receive an instruction from an external host device and control the semiconductor memory device via the input/output module. The first chip includes the memory cell array. The second chip includes the peripheral circuit, the input/output module, and the memory controller.

Abstract: A disclosed user device includes a receiver configured to receive emergency information from a network; and a control unit configured to change a process of detecting whether first emergency information is duplicated with second emergency information upon receiving, by the receiver, the second emergency information after the first emergency information, based on the first emergency information.

Abstract: According to one embodiment, a memory system includes a first chip and a second chip. The second chip is bonded with the first chip. The memory system includes a semiconductor memory device and a memory controller. The semiconductor memory device includes a memory cell array, a peripheral circuit, and an input/output module. The memory controller is configured to receive an instruction from an external host device and control the semiconductor memory device via the input/output module. The first chip includes the memory cell array. The second chip includes the peripheral circuit, the input/output module, and the memory controller.

Abstract: A memory system includes a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, including a history of commands for controlling the memory system. An information processing system includes the memory system and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value. The expected value and the transmitted value are determined based on the log data of the memory system.

Abstract: A network node for connecting to a plurality of base station devices, the plurality of base station devices each being connected to one or a plurality of core networks belonging to different systems, the network node including a controller that controls delivery of emergency information identical to delivery of emergency information activated by a first core network of the plurality of core networks so that the delivery of the emergency information identical to the delivery of the emergency information activated by the first core network of the plurality of core networks is prevented from being activated by a core network other than the first core network; and a transmitter that transmits a message for a base station device to deliver emergency information.

Abstract: According to one embodiment, a memory system includes a first chip and a second chip. The second chip is bonded with the first chip. The memory system includes a semiconductor memory device and a memory controller. The semiconductor memory device includes a memory cell array, a peripheral circuit, and an input/output module. The memory controller is configured to receive an instruction from an external host device and control the semiconductor memory device via the input/output module. The first chip includes the memory cell array. The second chip includes the peripheral circuit, the input/output module, and the memory controller.

Abstract: According to one embodiment, a memory system includes a first chip and a second chip. The second chip is bonded with the first chip. The memory system includes a semiconductor memory device and a memory controller. The semiconductor memory device includes a memory cell array, a peripheral circuit, and an input/output module. The memory controller is configured to receive an instruction from an external host device and control the semiconductor memory device via the input/output module. The first chip includes the memory cell array. The second chip includes the peripheral circuit, the input/output module, and the memory controller.

Abstract: A memory system of an embodiment includes a non-volatile memory and a controller configured to control the accessing of the non-volatile memory according to commands from a host device. The controller is configured to set a mode transition time to a value according to a first command received from the host. The controller transitions from a first operating mode to a second operating mode, in which power supply is suspended to a predetermined circuit, when the time since the last command was received from the host device reaches the mode transition time. The controller maintains the second operating mode until another command is received from the host device.

Abstract: According to one or more embodiments, a memory system includes a signal terminal, a power line, a resistance element, a nonvolatile semiconductor memory, and a controller. The resistance element is provided between the signal terminal and the power line. The nonvolatile semiconductor memory is configured to transmit and receive a signal to and from a host device via the signal terminal. The controller is configured to determine whether to connect the signal terminal to the power line via the resistance element.

Abstract: A switch is provided. The switch is connected to a control apparatus for controlling Lawful Interception, and relays packets transmitted and received between a user apparatus and an IMS apparatus in the home network of the user apparatus. The switch includes a determination unit configured to determine whether the user apparatus is a Lawful Interception target or whether the user apparatus is a roaming user; and a transmission unit configured to, in the case where the user apparatus is a Lawful Interception target or in the case where the user apparatus is a roaming user, transmit to a mobile management switch information indicating to the user apparatus that the user apparatus should transmit and receive the packets to and from the IMS apparatus without encryption.

Abstract: A user equipment includes a receiving unit configured to receive, from a network node in a VPLMN (Visited Public land mobile network), information indicating a PLMN to be prioritized and information indicating a trigger of PLMN selection; and a control unit configured to execute the PLMN selection, based on the information indicating the PLMN to be prioritized and the information indicating the trigger of the PLMN selection.

Abstract: A network node is a first network node in a VPLMN (Visited Public land mobile network), the network node including a receiving unit configured to receive information relating to network selection, from a second network node in an HPLMN (Home Public land mobile network); a transmitting unit configured to transmit the information relating to network selection, to a user equipment; and a control unit configured to transmit, to the second network node, a response indicating that the user equipment was unable to receive the information relating to network selection, when a response, with respect to the information relating to network selection transmitted to the user equipment, is not received from the user equipment.

Abstract: According to one embodiment, a memory system includes a first chip and a second chip. The second chip is bonded with the first chip. The memory system includes a semiconductor memory device and a memory controller. The semiconductor memory device includes a memory cell array, a peripheral circuit, and an input/output module. The memory controller is configured to receive an instruction from an external host device and control the semiconductor memory device via the input/output module. The first chip includes the memory cell array. The second chip includes the peripheral circuit, the input/output module, and the memory controller.