Abstract: A frequency synthesizer, including a phase-locked loop. The phase locked loop effects phase comparison between a comparison signal based on an output from a voltage-controlled oscillator and a reference signal based on an output from a reference oscillator. The resultant phase difference signal is submitted to a loop filter whose output serves as a control signal of the voltage-controlled oscillator. The frequency synthesizer includes a preset circuit for switching the output of the voltage-controlled oscillator by quickly charging or discharging a capacitor of the loop filter and a modifying circuit for modifying the time constant of the loop filter. The phase-locked loop is brought to phase lock at a high speed by decreasing the time constant of the loop filter when switching the output frequency.