Patents by Inventor Shinya YOKOMIZO
Shinya YOKOMIZO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240372508Abstract: Disclosed is a harmonic mixer including N transistors, an RF terminal, N LO terminals, an IF terminal, a series resonant circuit, and an IF matching circuit, in which when the RF frequency of a high frequency signal is identical or close to the maximum oscillation frequency of the transistors, the impedance seen from the IF terminal toward an output terminal at the RF frequency becomes low, and the impedance seen from the IF terminal toward the output terminal at an IF frequency is the combination of the impedance of the series resonant circuit and the impedance of the IF matching circuit.Type: ApplicationFiled: July 15, 2024Publication date: November 7, 2024Applicant: Mitsubishi Electric CorporationInventors: Shinya YOKOMIZO, Sho IKEDA, Yoshiaki MORINO
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Publication number: 20240372259Abstract: An antenna device includes an antenna excitation element provided on a surface of a substrate, a conductor pattern provided on the surface of the substrate and disposed around the antenna excitation element without being in contact with the antenna excitation element, a parasitic element provided on a surface of a substrate facing the surface of the substrate, and a conductor pattern provided on the surface of the substrate and disposed around the parasitic element without being in contact with the parasitic element, in which the conductor pattern and the conductor pattern are electrically connected to each other, a thickness of the conductor pattern is formed to be equal to or larger than a thickness of the antenna excitation element, and a thickness of the conductor pattern is formed to be equal to or larger than a thickness of the parasitic element.Type: ApplicationFiled: July 17, 2024Publication date: November 7, 2024Applicant: Mitsubishi Electric CorporationInventors: Takuma NISHIMURA, Toru TAKAHASHI, Hidenori ISHIBASHI, Toru FUKASAWA, Shinya YOKOMIZO, Hidenori YUKAWA
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Publication number: 20230099900Abstract: There is provided an active phased array antenna in which power to an Si wafer is separated from power to compound semiconductor chips. An active phased array antenna is an active phased array antenna including a substrate having a plurality of antenna elements; a pseudo wafer containing a group of semiconductor chips including a plurality of semiconductor chips made of compound semiconductors; and a silicon wafer made of silicon, the substrate, the pseudo wafer, and the silicon wafer being stacked on top of each other in this order, and the pseudo wafer includes first feeders for supplying power to the group of semiconductor chips from the substrate; and a second feeder for supplying power to the silicon wafer from the substrate, the second feeder passing through the pseudo wafer in a thickness direction of the pseudo wafer.Type: ApplicationFiled: December 7, 2022Publication date: March 30, 2023Applicant: Mitsubishi Electric CorporationInventors: Kengo KAWASAKI, Akihito HIRAI, Shinya YOKOMIZO, Masaomi TSURU
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Patent number: 11463047Abstract: A mixer includes a first unit mixer, a second unit mixer, a third unit mixer, and a fourth unit mixer that have the same configuration and a first combiner, a second combiner, and a third combiner that have the same configuration. The first to the fourth unit mixers each include a differential RF signal terminal. Output of the first unit mixer and output of the second unit mixer are combined by the second combiner. Output of the third unit mixer and output of the fourth unit mixer are combined by the third combiner. Output of the second combiner and output of the third combiner are combined by the first combiner. The output of the third unit mixer is input to the third combiner with the polarity being determined.Type: GrantFiled: September 3, 2021Date of Patent: October 4, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Shinya Yokomizo, Takanobu Fujiwara, Masaomi Tsuru, Mitsuhiro Shimozawa, Akihito Hirai
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Patent number: 11233495Abstract: A mixer includes: a VGA (12) configured to amplify one of divided two portions of an input signal at a gain of cos ?; a VGA (13) configured to amplify another one of the divided two portions of the input signal at a gain of sin ?; an IQ generator (15) configured to input an LO wave, and output an LO wave in phase with the input LO wave and an LO wave having a phase difference of 90° with respect to the input LO wave; a mixer (16) configured to input the signal output from the VGA (12) and the LO wave which is output from the IQ generator (15), to output an RF signal; a second mixer (17) configured to input the signal from the VGA (13) and the LO wave which is output from the IQ generator, to output an RF signal; and a combiner (18).Type: GrantFiled: July 22, 2020Date of Patent: January 25, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Shinya Yokomizo, Akihito Hirai, Mitsuhiro Shimozawa
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Publication number: 20210399686Abstract: A mixer includes a first unit mixer, a second unit mixer, a third unit mixer, and a fourth unit mixer that have the same configuration and a first combiner, a second combiner, and a third combiner that have the same configuration. The first to the fourth unit mixers each include a differential RF signal terminal. Output of the first unit mixer and output of the second unit mixer are combined by the second combiner. Output of the third unit mixer and output of the fourth unit mixer are combined by the third combiner. Output of the second combiner and output of the third combiner are combined by the first combiner. The output of the third unit mixer is input to the third combiner with the polarity being determined.Type: ApplicationFiled: September 3, 2021Publication date: December 23, 2021Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Shinya YOKOMIZO, Takanobu FUJIWARA, Masaomi TSURU, Mitsuhiro SHIMOZAWA, Akihito HIRAI
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Publication number: 20200350886Abstract: A mixer includes: a VGA (12) configured to amplify one of divided two portions of an input signal at a gain of cos ?; a VGA (13) configured to amplify another one of the divided two portions of the input signal at a gain of sin ?; an IQ generator (15) configured to input an LO wave, and output an LO wave in phase with the input LO wave and an LO wave having a phase difference of 90° with respect to the input LO wave; a mixer (16) configured to input the signal output from the VGA (12) and the LO wave which is output from the IQ generator (15) , to output an RF signal; a second mixer (17) configured to input the signal from the VGA (13) and the LO wave which is output from the IQ generator, to output an RF signal; and a combiner (18).Type: ApplicationFiled: July 22, 2020Publication date: November 5, 2020Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Shinya YOKOMIZO, Akihito HIRAI, Mitsuhiro SHIMOZAWA