Patents by Inventor Shinzi Kawada

Shinzi Kawada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6806164
    Abstract: First, a substrate, on which a plurality of semiconductor devices is formed, is provided. Next, a first etching treatment is carried out to the substrate with a first etching gas comprising CF4 to form a base trench having a rounded-off upper edge or tapered upper edge. A second etching treatment is carried out to the substrate to form a trench region at the base trench so that the trench region has a rounded-off upper edge. And then, an insulating layer is formed on the substrate to fill up the trench region therewith.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: October 19, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Shinzi Kawada, Hiroyuki Kawano
  • Publication number: 20020160615
    Abstract: First, a substrate, on which a plurality of semiconductor devices is formed, is provided. Next, a first etching treatment is carried out to the substrate with a first etching gas comprising CF4 to form a base trench having a rounded-off upper edge or tapered upper edge. A second etching treatment is carried out to the substrate to form a trench region at the base trench so that the trench region has a rounded-off upper edge. And then, an insulating layer is formed on the substrate to fill up the trench region therewith.
    Type: Application
    Filed: June 21, 2002
    Publication date: October 31, 2002
    Inventors: Shinzi Kawada, Hiroyuki Kawano
  • Patent number: 6444540
    Abstract: First, a substrate, on which a plurality of semiconductor devices is formed, is provided. Next, a first etching treatment is carried out to the substrate with a first etching gas comprising CF4 to form a base trench having a rounded-off upper edge or tapered upper edge. A second etching treatment is carried out to the substrate to form a trench region at the base trench so that the trench region has a rounded-off upper edge. And then, an insulating layer is formed on the substrate to fill up the trench region therewith.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: September 3, 2002
    Assignee: Oki Electric Industry Co., LTD
    Inventors: Shinzi Kawada, Hiroyuki Kawano
  • Publication number: 20010049178
    Abstract: First, a substrate, on which a plurality of semiconductor devices is formed, is provided. Next, a first etching treatment is carried out to the substrate with a first etching gas comprising CF4 to form a base trench having a rounded-off upper edge or tapered upper edge. A second etching treatment is carried out to the substrate to form a trench region at the base trench so that the trench region has a rounded-off upper edge. And then, an insulating layer is formed on the substrate to fill up the trench region therewith.
    Type: Application
    Filed: May 25, 2001
    Publication date: December 6, 2001
    Inventors: Shinzi Kawada, Hiroyuki Kawano