Patents by Inventor Shiori MURAYAMA

Shiori MURAYAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method for manufacturing semiconductor device
    Patent number: 11264511
    Abstract: A semiconductor device with high on-state current is provided. The semiconductor device includes a transistor. The transistor includes a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a third oxide; a first conductor and a second conductor over the second oxide; a second insulator; a third conductor; a fourth insulator over the first conductor and the second conductor; and a third insulator over the fourth insulator. An opening reaching the second oxide is provided in the third insulator and the fourth insulator. The third oxide is positioned to cover an inner wall of the opening. The second insulator is positioned to cover the inner wall of the opening with the third oxide therebetween. The third conductor is positioned to fill the opening with the third oxide and the second insulator therebetween.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: March 1, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Haruyuki Baba, Shiori Murayama
  • SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20200403101
    Abstract: A semiconductor device with high on-state current is provided. The semiconductor device includes a transistor. The transistor includes a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a third oxide; a first conductor and a second conductor over the second oxide; a second insulator; a third conductor; a fourth insulator over the first conductor and the second conductor; and a third insulator over the fourth insulator. An opening reaching the second oxide is provided in the third insulator and the fourth insulator. The third oxide is positioned to cover an inner wall of the opening. The second insulator is positioned to cover the inner wall of the opening with the third oxide therebetween. The third conductor is positioned to fill the opening with the third oxide and the second insulator therebetween.
    Type: Application
    Filed: February 19, 2019
    Publication date: December 24, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Haruyuki BABA, Shiori MURAYAMA