Patents by Inventor Shirish Aundhe

Shirish Aundhe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10120731
    Abstract: Various embodiments are generally directed to techniques for controlling the use of locks that regulate access to shared resources by concurrently executed portions of code. An apparatus to control locking of a resource includes a processor component, a history analyzer for execution by the processor component to analyze at least one result of a replacement of a lock instruction of a first instance of code with a lock marker to allow the processor component to speculatively execute a second instance of code, and a locking component for execution by the processor component to replace the lock instruction with the lock marker based on analysis of the at least one result, the first and second instances of code to access a resource and the lock instruction to request a lock of access to the resource to the first instance of code. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: November 6, 2018
    Assignee: INTEL CORPORATION
    Inventors: Khun Ban, Kingsum Chow, Shirish Aundhe, Sandhya Viswanathan
  • Publication number: 20180095892
    Abstract: A processor of an aspect includes a decode unit to decode an instruction. The instruction is to indicate source memory address information, and the instruction to indicate a destination architecturally-visible storage location. The processor also includes an execution unit coupled with the decode unit. The execution unit, in response to the instruction, is to store a result in the destination architecturally-visible storage location. The result is to include one of: (1) a page group identifier that is to correspond to a logical memory address that is to be based, at least in part, on the source memory address information; and (2) a set of page group metadata that is to correspond to the page group identifier. Other processors, methods, systems, and instructions are disclosed.
    Type: Application
    Filed: October 1, 2016
    Publication date: April 5, 2018
    Applicant: Intel Corporation
    Inventors: Hugh Wilkinson, William R. Wheeler, Shirish Aundhe, Sandhya Viswanathan, David A. Koufaty
  • Publication number: 20150220372
    Abstract: Various embodiments are generally directed to techniques for controlling the use of locks that regulate access to shared resources by concurrently executed portions of code. An apparatus to control locking of a resource includes a processor component, a history analyzer for execution by the processor component to analyze at least one result of a replacement of a lock instruction of a first instance of code with a lock marker to allow the processor component to speculatively execute a second instance of code, and a locking component for execution by the processor component to replace the lock instruction with the lock marker based on analysis of the at least one result, the first and second instances of code to access a resource and the lock instruction to request a lock of access to the resource to the first instance of code. Other embodiments are described and claimed.
    Type: Application
    Filed: July 15, 2013
    Publication date: August 6, 2015
    Inventors: Khun Ban, Kingsum Chow, Shirish Aundhe, Sandhya Viswanathan
  • Patent number: 8689215
    Abstract: Methods, data structures, instructions, and techniques for structured exception handling for user-level threads in a multi-threading system are provided. Registered filter routines may be dispatched to a thread unit not managed by the operating system (OS). The dispatch may occur by allowing an OS-managed thread unit (proxy) to invoke the OS-provided structured exception handling service (including dispatcher) on behalf of the sequestered thread unit. Alternatively, an OS-managed thread unit may include dispatch code and may, without OS intervention, dispatch the filter routine to the sequestered thread unit. Other embodiments are also described and claimed.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: April 1, 2014
    Assignee: Intel Corporation
    Inventors: Richard A. Hankins, Gautham N. Chinya, Hong Wang, David K. Poulsen, Shirish Aundhe, Baiju V. Patel, Sanjiv M. Shah
  • Patent number: 8079035
    Abstract: Data structure creation, organization and management techniques for data local to user-level threads are provided. In one embodiment, a method includes generating, for a user-level thread (“shred”) to run on a thread unit that is not managed by an operating system (“OS”), a storage area for local data and maintaining state in the storage area across a context switch from the thread unit that is not managed by the OS to a second thread unit that is managed by the OS. Other embodiments are also described and claimed.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: December 13, 2011
    Assignee: Intel Corporation
    Inventors: Richard A. Hankins, Gautham N. Chinya, Hong Wang, David K. Poulsen, Shirish Aundhe, John P. Shen, Sanjiv M. Shah, Baiju V. Patel
  • Publication number: 20080148259
    Abstract: Methods, data structures, instructions, and techniques for structured exception handling for user-level threads in a multi-threading system are provided. Registered filter routines may be dispatched to a thread unit not managed by the operating system (OS). The dispatch may occur by allowing an OS-managed thread unit (proxy) to invoke the OS-provided structured exception handling service (including dispatcher) on behalf of the sequestered thread unit. Alternatively, an OS-managed thread unit may include dispatch code and may, without OS intervention, dispatch the filter routine to the sequestered thread unit. Other embodiments are also described and claimed.
    Type: Application
    Filed: December 19, 2006
    Publication date: June 19, 2008
    Inventors: Richard A. Hankins, Gautham N. Chinya, Hong Wang, David K. Poulsen, Shirish Aundhe, Baiju V. Patel, Sanjiv M. Shah
  • Patent number: 7302381
    Abstract: A method and apparatus are described for specifying arbitrary words in a rule-based grammar, such as a context-free grammar. A wildcard identifier is used in a context-free grammar file in place of a predefined category of words. Artificial phoneme combinations that represent generic words in a speech engine's vocabulary database, and that represent pronunciations of the predefined category of words are defined by rules. A speech engine uses the artificial phoneme combinations to determine acceptable words to listen to, and generates a results object comprising generic words corresponding to the artificial phoneme combinations, as well as non-generic words that do not exist in a given CFG, where the generic and non-generic words exist in the speech engine's vocabulary database. The word having the highest confidence level that is not a generic word is selected as the word most likely to have been spoken by the user.
    Type: Grant
    Filed: December 30, 2000
    Date of Patent: November 27, 2007
    Assignee: Intel Corporation
    Inventors: Shuvranshu Pokhariyal, Shirish Aundhe, Jason Davidson, Thomas Hernandez, Corey Gough
  • Publication number: 20070156967
    Abstract: In one embodiment, an object oriented programming language can pre-fetch objects and fields within those objects to a cache memory. A hardware performance monitor can be used to identify loads that read from an address that is frequently absent from a memory. Instrumentation can be used to mark the objects that include the frequently missed address. A compiler can identify chains of objects that are frequently absent from memory. The chains of objects can be pre-fetched without regard to the types of object. Other embodiments are described and claimed.
    Type: Application
    Filed: December 29, 2005
    Publication date: July 5, 2007
    Inventors: Michael Bond, Shirish Aundhe, Greg Eastman, Suresh Srinivas
  • Publication number: 20070150900
    Abstract: Data structure creation, organization and management techniques for data local to user-level threads are provided. Other embodiments are also described and claimed.
    Type: Application
    Filed: December 27, 2005
    Publication date: June 28, 2007
    Inventors: Richard Hankins, Gautham Chinya, Hong Wang, David Poulsen, Shirish Aundhe, John Shen, Sanjiv Shah, Baiju Patel
  • Patent number: 7203645
    Abstract: A speech recognition framework receives information about a recognized phrase from a speech engine. The framework identifies the application that is a focus of the recognized phrase. The framework then selects a handler function based on the recognized phrase and the application. The framework calls the handler function, which responds to the phrase.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: April 10, 2007
    Assignee: Intel Corporation
    Inventors: Shuvranshu Pokhariyal, Shirish Aundhe, Thomas Hernandez
  • Publication number: 20030105745
    Abstract: A text-based relational database system is disclosed. Tags specifying data semantics may be used to store data in a text file using a relational database model. An application program interface may be provided that allows the text file data to be accessed as though it were a relational database. A text-based relational database management system may be provided that enables multiple operations on a text-file based relational database. The text file may be an Extensible Markup Language file and the operations may conform to a relational database query protocol standard, such as an Structure Query Language (SQL) standard (e.g., International Standard 9075:1992).
    Type: Application
    Filed: December 5, 2001
    Publication date: June 5, 2003
    Inventors: Jason A. Davidson, Shirish Aundhe
  • Publication number: 20030014251
    Abstract: A speech recognition framework receives information about a recognized phrase from a speech engine. The framework identifies the application that is a focus of the recognized phrase. The framework then selects a handler function based on the recognized phrase and the application. The framework calls the handler function, which responds to the phrase.
    Type: Application
    Filed: April 27, 2001
    Publication date: January 16, 2003
    Inventors: Shuvranshu Pokhariyal, Shirish Aundhe, Thomas Hernandez
  • Publication number: 20020123876
    Abstract: A method and apparatus are described for specifying arbitrary words in a rule-based grammar, such as a context-free grammar. A wildcard identifier is used in a context-free grammar file in place of a predefined category of words. Artificial phoneme combinations that represent generic words in a speech engine's vocabulary database, and that represent pronunciations of the predefined category of words are defined by rules. A speech engine uses the artificial phoneme combinations to determine acceptable words to listen to, and generates a results object comprising generic words corresponding to the artificial phoneme combinations, as well as non-generic words that do not exist in a given CFG, where the generic and non-generic words exist in the speech engine's vocabulary database. The word having the highest confidence level that is not a generic word is selected as the word most likely to have been spoken by the user.
    Type: Application
    Filed: December 30, 2000
    Publication date: September 5, 2002
    Inventors: Shuvranshu Pokhariyal, Shirish Aundhe, Jason Davidson, Thomas Hernandez, Corey Gough