Patents by Inventor Shiro Hara

Shiro Hara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11686479
    Abstract: An encapsulated cleanroom system comprising a processing chamber and a storage section in which the processing chamber is stored, wherein, during operation, the pressure in the storage section is lower or higher than the pressures in the processing chamber and exterior space. The system can simultaneously prevent the entry of outside gases into its processing chamber and the leakage of the gases inside the processing chamber to the exterior space.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: June 27, 2023
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shiro Hara, Hitoshi Maekawa, Sommawan Khumpuang, Takashi Yajima, Yuuki Ishida
  • Publication number: 20220341053
    Abstract: The plating machine 1 comprises a plurality of treatment units 14 and a conveying means 13 that conveys a wafer W to the plurality of treatment units 14, wherein the conveying means 13 includes an arm 31 that is provided, on one end side, with a plating tool 32 that holds the wafer W, and an arm rotation drive unit 33 that rotates the arm 31 around another end side of the arm 31, and the plurality of treatment units 14 is arranged at predetermined intervals on a rotation trajectory of the plating tool 32.
    Type: Application
    Filed: April 12, 2022
    Publication date: October 27, 2022
    Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shiro HARA, Fumito IMURA, Sommawan KHUMPUANG, Yuuki ISHIDA, Toshihiro KIKUNO, Takafumi YOSHINAGA, Kayo KAMASAKI, Mitsuhiko FUKUYAMA, Tetuya MORIZONO
  • Publication number: 20210302034
    Abstract: An encapsulated cleanroom system comprising a processing chamber and a storage section in which the processing chamber is stored, wherein, during operation, the pressure in the storage section is lower or higher than the pressures in the processing chamber and exterior space. The system can simultaneously prevent the entry of outside gases into its processing chamber and the leakage of the gases inside the processing chamber to the exterior space.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 30, 2021
    Inventors: Shiro HARA, Hitoshi MAEKAWA, Sommawan KHUMPUANG, Takashi YAJIMA, Yuuki ISHIDA
  • Patent number: 11056410
    Abstract: A method of manufacturing a semiconductor package and a semiconductor package in which positional alignment between a wafer and a substrate until the wafer is mounted and packaged on the substrate is achieved accurately. A wafer is mounted on a package substrate by using first alignment marks and D-cuts as benchmarks, and then a mold resin layer is formed on the wafer in a state in which the first alignment mark is exposed. A part of the mold resin layer is removed by using the D-cuts exposed from the mold resin layer as benchmarks, so that the first alignment marks can be visually recognized. A second alignment marks are formed on the mold resin layer by using the first alignment marks as benchmarks. A Cu redistribution layer to be conducted to a pad portion is formed on a mold resin layer by using the second alignment marks as benchmarks.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: July 6, 2021
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shiro Hara, Sommawan Khumpuang, Fumito Imura
  • Patent number: 11011403
    Abstract: An automatic clamping mechanism capable of automatically securing and releasing a wafer transport container to or from a manufacturing apparatus and having a small height dimension is provided at low cost. A wafer transport container is placed on a container placing table. A semiconductor wafer is loaded into the manufacturing apparatus main body from a wafer loading port while being placed on a container base part of the wafer transport container. An automatic clamping mechanism generates a press force component in a vertical direction at the wafer transport container and secures the wafer transport container to the container placing table by bringing claw parts of a plurality of clamping claws into contact with an inclined contact surface provided on a container lid part of the wafer transport container and pressing the inclined contact surface in a substantially horizontal direction.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: May 18, 2021
    Assignees: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, DESIGN NETWORK CO., LTD.
    Inventors: Shiro Hara, Hitoshi Maekawa, Hiroyuki Nishihara, Koji Sagisawa
  • Publication number: 20200266119
    Abstract: A method of manufacturing a semiconductor package and a semiconductor package in which positional alignment between a wafer and a substrate until the wafer is mounted and packaged on the substrate is achieved accurately. A wafer is mounted on a package substrate by using first alignment marks and D-cuts as benchmarks, and then a mold resin layer is formed on the wafer in a state in which the first alignment mark is exposed. A part of the mold resin layer is removed by using the D-cuts exposed from the mold resin layer as benchmarks, so that the first alignment marks can be visually recognized. A second alignment marks are formed on the mold resin layer by using the first alignment marks as benchmarks. A Cu redistribution layer to be conducted to a pad portion is formed on a mold resin layer by using the second alignment marks as benchmarks.
    Type: Application
    Filed: March 28, 2018
    Publication date: August 20, 2020
    Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shiro HARA, Sommawan KHUMPUANG, Fumito IMURA
  • Patent number: 10632590
    Abstract: The work processing apparatus of the present invention comprises: a processing section for processing or treating a work; and a liquid chemical supplying section for supplying a liquid chemical to the processing section. The liquid chemical supplying section includes: a plurality of liquid chemical bags for storing the liquid chemical; a bag holding part in which the liquid chemical bags are attached and held; and a liquid feeding part, to which the liquid chemical bags are detachably connected, for feeding the liquid chemical from the liquid chemical bags to the processing section. Each of the liquid chemical bags is produced by overlapping flexible resin sheets with each other and welding their edge parts to form into a bag. Each of the liquid chemical bags has a port part communicating with an outside. A joint with a valve is attached to each of the port parts.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: April 28, 2020
    Assignees: FUJIKOSHI MACHINERY CORP., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Masayuki Tsukada, Kazutaka Shibuya, Takayuki Fuse, Yoshio Nakamura, Shiro Hara
  • Patent number: 10478867
    Abstract: A treatment liquid supply device and a wet treatment device with which an extremely small quantity of the treatment liquid can be accurately supplied, as a method for supplying a treatment liquid to an extremely small wafer of half inch size, including: a syringe that sucks and discharges the treatment liquid; a treatment liquid bottle that is filled with the treatment liquid; a suction hose that has one end connected to the treatment liquid bottle and the other end connected to the syringe, and sucks the treatment liquid inside the treatment liquid bottle to the syringe; a supply hose that has one end connected to an intermediate section of the suction hose and serves to supply, to the surface of the wafer, the treatment liquid discharged by the syringe; and a three-way solenoid valve that controls opening/closing of each of the suction and supply hoses.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: November 19, 2019
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shiro Hara, Sommawan Khumpuang, Akio Kobayashi, Takeshi Umino, Sonoko Matsuda
  • Patent number: 10431446
    Abstract: A wafer cleaner and a method therefor that efficiently cleans a wafer with a little amount of a cleaning liquid and efficiently performs a heating wet cleaning processing. The present invention includes a stage where a wafer is placed, a rotary driving unit that rotates the stage in a circumferential direction, a liquid discharge nozzle disposed facing the wafer placed on the stage and supplies a cleaning liquid on the wafer placed on the stage, and a control unit that causes the liquid discharge nozzle to supply a space between the wafer placed on the stage and the liquid discharge nozzle with a predetermined amount of the cleaning liquid to fill the space. The present invention also includes a lamp disposed on a position facing the wafer placed on the stage to heat at least an interface portion of the wafer and a cleaning liquid.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: October 1, 2019
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shiro Hara, Sommawan Khumpuang, Shinichi Ikeda, Akihiro Goto, Hiroshi Amano
  • Patent number: 10332768
    Abstract: A compact manufacturing device to automatically transport a wafer transport container. The compact manufacturing device comprises a processing chamber and a device front chamber provided inside a housing, a container mounting table provided in the housing to mount a substrate transport container accommodating a processing substrate, and a container transport mechanism. The container transport mechanism delivers the substrate transport container to the adjacent compact manufacturing device along a container transport path and/or receives the substrate transport container from adjacent compact manufacturing device along the container transport path when a plurality of the compact manufacturing devices are provided in parallel.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: June 25, 2019
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shiro Hara, Hitoshi Maekawa
  • Publication number: 20190164797
    Abstract: An automatic clamping mechanism capable of automatically securing and releasing a wafer transport container to or from a manufacturing apparatus and having a small height dimension is provided at low cost. A wafer transport container is placed on a container placing table. A semiconductor wafer is loaded into the manufacturing apparatus main body from a wafer loading port while being placed on a container base part of the wafer transport container. An automatic clamping mechanism generates a press force component in a vertical direction at the wafer transport container and secures the wafer transport container to the container placing table by bringing claw parts of a plurality of clamping claws into contact with an inclined contact surface provided on a container lid part of the wafer transport container and pressing the inclined contact surface in a substantially horizontal direction.
    Type: Application
    Filed: November 7, 2018
    Publication date: May 30, 2019
    Applicants: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, DESIGN NETWORK CO., LTD.
    Inventors: Shiro HARA, Hitoshi MAEKAWA, Hiroyuki NISHIHARA, Koji SAGISAWA
  • Patent number: 10304675
    Abstract: A semiconductor manufacturing system has a series of steps, from manufacturing of a semiconductor on a wafer until packaging, that can be easily linked. A semiconductor chip manufacturing device manufactures a semiconductor chip, and a semiconductor packaging device packages the semiconductor chip by attaching the semiconductor chip to a package substrate which is larger than the wafer. The semiconductor chip manufacturing device includes a PLAD system for loading the wafer into and out of the semiconductor chip manufacturing device through a shuttle which is capable of housing the wafer. The semiconductor packaging device includes a PLAD system capable of loading the package substrate into and out of the semiconductor packaging device through a shuttle which is capable of housing the package substrate. The shuttles have container bodies of a same shape.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: May 28, 2019
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Michihiro Inoue, Shiro Hara, Fumito Imura, Arami Saruwatari, Sommawan Khumpuang
  • Patent number: 10286426
    Abstract: A columnar laminar flow generation device includes: a placement part on which to place a processing target; a gas blow-out part having an opening; and a gas suction path; wherein the placement part is positioned in a space whose outer periphery surface is constituted by extending the interior wall of the opening in the direction vertical to the opening; the opening has, in its interior wall, a gas blow-out port through which a gas is blown out in one direction vertical to the opening; and the gas suction path is formed in such a way that it suctions the gas in the direction opposite to the one in which the gas is blown out. The columnar laminar generation device is capable of generating columnar laminar flows.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: May 14, 2019
    Assignees: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, LITHO TECH JAPAN CORPORATION, ORIENTAL MOTOR CO., LTD.
    Inventors: Shuuji Okuda, Sommawan Khumpuang, Shiro Hara, Sho Takeuchi, Yoshihisa Sensu, Takahiro Ito
  • Patent number: 10240350
    Abstract: A free access floor structure to install a manufacturing apparatus such as a semiconductor manufacturing apparatus, in a short time, and a manufacturing apparatus and a carrier apparatus adapted for the floor structure. An embodiment of the manufacturing apparatus includes an apparatus-side connector which is provided, facing downward, to a bottom plate of a manufacturing apparatus. A floor structure of an embodiment includes a floor plate to be worked into a floor surface. The floor structure includes a floor-side connector which is provided, facing upward, to the floor plate so as to be connected with the apparatus-side connector according to a lowering operation of the manufacturing apparatus. An installation step (mounting step, piping/wiring step) of the manufacturing apparatus may thereby be performed in one step. As a result, the labor and the time required to install the manufacturing apparatus may be saved.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: March 26, 2019
    Assignees: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, SANYO CO., LTD.
    Inventors: Tadanari Anpo, Shiro Hara
  • Patent number: 10186489
    Abstract: To provide a crystal orientation mark which can be formed easily and inexpensively, and which enables to perform high precision alignment and allows information other than crystal orientation to be included, even for a small diameter process substrate. A crystal orientation mark is drawn on the surface of the process substrate. The crystal orientation mark includes a marking region for crystal orientation detection, and a marking region for information. The marking region for crystal orientation detection is provided at two locations in an outer edge portion of the process substrate to be used for the alignment of the process substrate. The marking region for information is provided on a straight-line region connecting the marking regions for crystal orientation detection at the two locations, and includes a pattern for demonstrating predetermined information relating to the process substrate.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: January 22, 2019
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shiro Hara, Sommawan Khumpuang, Shinichi Ikeda
  • Patent number: 10163819
    Abstract: A method for manufacturing a surface-mount type package whose face parallel with the semiconductor chip surface has a circular cross-section, is characterized by including at least the following steps in this order: a first step in which a semiconductor chip is bonded onto a circular support substrate; a second step in which the semiconductor chip is sealed with resin; a third step in which the resin covering the pads of the semiconductor chip is removed; a fourth step in which a rewiring layer is formed; and a fifth step in which bumps are formed. The method can provide a surface-mount type package for semiconductor chips which is resistant to failures caused by thermal stress.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: December 25, 2018
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shiro Hara, Sommawan Khumpuang, Fumito Imura, Michihiro Inoue, Arami Saruwatari
  • Patent number: 10163674
    Abstract: An object of the present invention is to provide a circular support substrate that allows for positioning based solely on its outer periphery shape. As a means for solving the problems, a circular support substrate is provided that has at least three chords along its circumference, wherein the chords are provided at positions where they do not run linearly symmetrical to the straight line passing through the center axis of the circular support substrate.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: December 25, 2018
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shiro Hara, Sommawan Khumpuang, Fumito Imura, Michihiro Inoue, Arami Saruwatari
  • Patent number: 10137570
    Abstract: The present invention provides a transfer robot which has a simple structure and a small occupied area in an operation. A transfer robot of the present invention includes a support member fixed to a side wall or the like, a transfer arm by which a hand member is held capable of linear movement, and first and second link members. One end portions of the first and second link members are rotatably linked to the support member, respectively. Another end portions of the first and second link members are rotatably linked to the transfer arm, respectively. The hand member holds/transfers a work. A rotational driving force applied to a linking portion between the support member and the first link member is transmitted to the transfer arm by a predetermined mechanism and linearly moves the hand member. The transfer arm moves by rotating the first link member or the second link member.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: November 27, 2018
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Kenji Hirota, Shinichi Imai, Shiro Hara, Hitoshi Maekawa
  • Patent number: 10115619
    Abstract: A transfer box has a sealing structure hermetically sealable by means of tight coupling of a transfer box body and a transfer box door. The transfer box is structured in such a way that magnets on the transfer box body face magnetic bodies on the transfer box door when the transfer box door is closed on the transfer box body, with these magnets and magnetic bodies forming a magnetic closed circuit.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: October 30, 2018
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY (AIST)
    Inventors: Shiro Hara, Hitoshi Maekawa
  • Publication number: 20180025994
    Abstract: An object of the present invention is to provide a surface-mount type package for semiconductor chips which is resistant to failures caused by thermal stress. As a means for achieving the object, a method for manufacturing a surface-mount type package whose face parallel with the semiconductor chip surface has a circular cross-section, is provided, wherein such method is characterized in that it comprises at least the following steps in this order. A first step in which a semiconductor chip is bonded onto a circular support substrate. A second step in which the semiconductor chip is sealed with resin. A third step in which the resin covering the pads of the semiconductor chip is removed. A fourth step in which a rewiring layer is formed. A fifth step in which bumps are formed.
    Type: Application
    Filed: November 24, 2015
    Publication date: January 25, 2018
    Inventors: Shiro HARA, Sommawan KHUMPUANG, Fumito IMURA, Michihiro INOUE, Arami SARUWATARI