Patents by Inventor Shiro Ohtaka

Shiro Ohtaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6566157
    Abstract: Alignment marks and a method of forming the alignment marks are provided. The method includes the steps of forming a first alignment mark in an alignment mark forming area on the substrate, forming an opaque layer that is opaque to the alignment light above the alignment mark forming area where the first alignment mark is formed, substantially flattening a surface of the opaque layer, and forming a second alignment mark on a side where the alignment light is incident with respect to the flattened opaque layer.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: May 20, 2003
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Shiro Ohtaka
  • Patent number: 6410401
    Abstract: An alignment mark appears on the surface of an aluminum wiring layer, when the wiring layer is formed to fill a recess. The recess is formed in oxide layers formed over the surface of a silicon substrate by etching. The depth of the recess is controlled to prevent direct contact between the wiring layer and metallic silicon of the silicon substrate. The wiring layer is thus prevented from chemically reacting with the metallic silicon so that deterioration of the oxide films and destruction of the alignment mark appearing on the surface of the wiring layer are prevented, even if the wiring layer is formed by sputtering aluminum on oxide layers and the recess at a high temperature.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: June 25, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Shiro Ohtaka
  • Publication number: 20020028528
    Abstract: Alignment marks and a method of forming the alignment marks are provided. The method includes the steps of forming a first alignment mark in an alignment mark forming area on the substrate, forming an opaque layer that is opaque to the alignment light above the alignment mark forming area where the first alignment mark is formed, substantially flattening a surface of the opaque layer, and forming a second alignment mark on a side where the alignment light is incident with respect to the flattened opaque layer.
    Type: Application
    Filed: January 26, 2001
    Publication date: March 7, 2002
    Inventor: Shiro Ohtaka
  • Patent number: 6100157
    Abstract: An alignment mark AM appears on the surface of an aluminum (Al) wiring layer 110 when the Al wiring layer is formed to fill up a recess 108 therewith, the recess 108 being formed in oxide layers 104 and 106 formed over the surface of a silicon substrate 102 by etching these layers in part. The depth of the recess 108 is controlled such that there is formed no direct contact between the Al wiring layer 110 and the metallic silicon of the silicon substrate 102. Consequently, in the process of forming the alignment mark, the Al wiring layer 110 is prevented from chemically reacting with the metallic silicon. Thus, there is caused neither deterioration in the quality of oxide films 104 and 106, nor destruction of the alignment mark AM appearing on the surface of the Al wiring layer 110, even if the Al wiring layer 110 is formed by sputtering aluminum on oxide layers and the recess as well at a high temperature.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: August 8, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Shiro Ohtaka
  • Patent number: 6037670
    Abstract: An alignment mark AM appears on the surface of an aluminum (Al) wiring layer 110 when the Al wiring layer is formed to fill up a recess 108 therewith, the recess 108 being formed in oxide layers 104 and 106 formed over the surface of a silicon substrate 102 by etching these layers in part. The depth of the recess 108 is controlled such that there is formed no direct contact between the Al wiring layer 110 and the metallic silicon of the silicon substrate 102. Consequently, in the process of forming the alignment mark, the Al wiring layer 110 is prevented from chemically reacting with the metallic silicon. Thus, there is caused neither deterioration in the quality of oxide films 104 and 106, nor destruction of the alignment mark AM appearing on the surface of the Al wiring layer 110, even if the Al wiring layer 110 is formed by sputtering aluminum on oxide layers and the recess as well at a high temperature.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: March 14, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Shiro Ohtaka