Patents by Inventor Shirou Morinaga

Shirou Morinaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6333276
    Abstract: A semiconductor device according to the present invention includes insulating branches which are formed as an interlayer insulating film on a semiconductor substrate. The interlayer insulating film has holes (voids) between the branches to thereby reduce electrostatic capacitance between stacked layers within a semiconductor device.
    Type: Grant
    Filed: October 26, 2000
    Date of Patent: December 25, 2001
    Assignee: NEC Corporation
    Inventor: Shirou Morinaga
  • Patent number: 6297150
    Abstract: In a method of manufacturing a semiconductor device, an interlayer insulating film (3) is formed on lower-layer wires (2) formed on a semiconductor substrate (1), wherein an SiO2 insulating layer (31) is formed, and a BPSG insulating layer (32) is formed on the SiO2 insulating layer (31). Thereafter, a BPSG insulating layer (33) having higher fluidity to a heat treatment than the insulating layer (32) is formed on the BPSG insulating layer (32), a BPSG insulating layer (34) having the same fluidity to a heat treatment as the insulating layer (32) is formed on the BPSG insulating layer (33), and then the upper surface thereof is flattened. A perforation step is carried out to form pores penetrating through the insulating layers (32, 33and 34), and then the heat treatment is carried out to fluidize the insulating layer (33) and close the pore portion in the insulating layer (33), thereby leaving the pore portion in the insulating layer (32) as voids (7).
    Type: Grant
    Filed: February 7, 2000
    Date of Patent: October 2, 2001
    Assignee: NEC Corporation
    Inventor: Shirou Morinaga
  • Patent number: 6266137
    Abstract: A particle detecting apparatus for testing a substrate with a film on its surface includes a light source section, an optical system, a light quantity measuring section and an operation section. The light source section emits first and second light beams respectively having first and second wavelengths which are different from each other. The optical system directs the first and second light beams to an incident point on the substrate, wherein the first and second light beams are scattered on the substrate to produce first and second scattered light beams. The light quantity measuring section measures a quantity of the first scattered light beam and a quantity of the second scattered light beam. The operation section detects a foreign particle on or in the film based on the first scattered light beam quantity and the second scattered light beam quantity measured by the light quantity measuring section.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: July 24, 2001
    Assignee: NEC Corporation
    Inventor: Shirou Morinaga
  • Patent number: 6162740
    Abstract: A semiconductor device according to the present invention includes insulating branches which are formed as an interlayer insulating film on a semiconductor substrate. The interlayer insulating film has holes (voids) between the branches to thereby reduce electrostatic capacitance between stacked layers within a semiconductor device.
    Type: Grant
    Filed: July 13, 1998
    Date of Patent: December 19, 2000
    Assignee: NEC Corporation
    Inventor: Shirou Morinaga