Patents by Inventor Shishir JOSHI

Shishir JOSHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Power management for multiple-chiplet systems
    Patent number: 11733767
    Abstract: Various embodiments may include methods and systems for power management of multiple chiplets within a system-on-a-chip (SoC). Various systems may include a power management integrated circuit (PMIC) configured to supply power to a first chiplet and a second chiplet across a shared power rail. The first chiplet may be configured to obtain first sensory information throughout the first chiplet. The second chiplet may be configured to obtain second sensory information throughout the second chiplet, and may be configured to transmit a voltage change message to the first chiplet based on the second sensory information. The first chiplet may be configured to transmit a power rail adjustment message to the PMIC based on the first sensory information and the voltage change message. The PMIC may be configured to adjust the voltage of at least one of the first chiplet and the second chiplet.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: August 22, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Prashanth Kumar Kakkireni, Matthew Severson, Kumar Kanti Ghosh, Shishir Joshi
  • Power Management for Multiple-Chiplet Systems
    Publication number: 20220413593
    Abstract: Various embodiments may include methods and systems for power management of multiple chiplets within a system-on-a-chip (SoC). Various systems may include a power management integrated circuit (PMIC) configured to supply power to a first chiplet and a second chiplet across a shared power rail. The first chiplet may be configured to obtain first sensory information throughout the first chiplet. The second chiplet may be configured to obtain second sensory information throughout the second chiplet, and may be configured to transmit a voltage change message to the first chiplet based on the second sensory information. The first chiplet may be configured to transmit a power rail adjustment message to the PMIC based on the first sensory information and the voltage change message. The PMIC may be configured to adjust the voltage of at least one of the first chiplet and the second chiplet.
    Type: Application
    Filed: June 25, 2021
    Publication date: December 29, 2022
    Inventors: Prashanth Kumar KAKKIRENI, Matthew SEVERSON, Kumar Kanti GHOSH, Shishir JOSHI