Patents by Inventor Shishir Ramasare Shukla

Shishir Ramasare Shukla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230128387
    Abstract: Systems and methods for amplifying a signal is described. A circuit may convert an input radio frequency (RF) signal into a first RF signal with power level matching a power capacity of a first transistor of a first size in a carrier amplifier stage, a second RF signal with power level matching a power capacity of a second transistor of the first size in a peaking amplifier stage, and a third RF signal with third power level matching a power capacity of a third transistor of a second size in another peaking amplifier stage. The circuit may amplify the first, second, and third RF signals to generate first, second, and third amplified RF signals, respectively. The circuit may combine the first, second, and third amplified RF signals, into an output RF signal that is an amplified version of the input RF signal.
    Type: Application
    Filed: October 27, 2021
    Publication date: April 27, 2023
    Applicant: Renesas Electronics America Inc.
    Inventors: Hussain Hasanali Ladhani, Ramanujam Srinidhi Embar, Michael Guyonnet, Tushar Sharma, Shishir Ramasare Shukla
  • Patent number: 10381984
    Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: August 13, 2019
    Assignee: NXP USA, Inc.
    Inventors: Yu-Ting David Wu, Enver Krvavac, Joseph Gerard Schultz, Nick Yang, Damon G. Holmes, Shishir Ramasare Shukla, Jeffrey Kevin Jones, Elie A. Maalouf, Mario Bokatius
  • Patent number: 10263067
    Abstract: A radio frequency (RF) chip capacitor circuit and structure are provided. The circuit and structure include a plurality of capacitors connected in series. Each capacitor of the plurality includes a first plate formed from a first metal layer and a second plate formed from a second metal layer. A first two adjacent capacitors of the plurality include first plates formed in a first contiguous portion of the first metal layer or second plates formed in a second contiguous portion of the second metal layer. Each capacitor of the plurality may include a dielectric layer disposed between the first plate and the second plate.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: April 16, 2019
    Assignee: NXP USA, INC.
    Inventors: Joseph Gerard Schultz, Yu-Ting Wu, Shishir Ramasare Shukla, Enver Krvavac, Hussain Hasanali Ladhani, Damon G. Holmes
  • Publication number: 20180331172
    Abstract: A radio frequency (RF) chip capacitor circuit and structure are provided. The circuit and structure include a plurality of capacitors connected in series. Each capacitor of the plurality includes a first plate formed from a first metal layer and a second plate formed from a second metal layer. A first two adjacent capacitors of the plurality include first plates formed in a first contiguous portion of the first metal layer or second plates formed in a second contiguous portion of the second metal layer. Each capacitor of the plurality may include a dielectric layer disposed between the first plate and the second plate.
    Type: Application
    Filed: May 12, 2017
    Publication date: November 15, 2018
    Inventors: JOSEPH GERARD SCHULTZ, YU-TING WU, SHISHIR RAMASARE SHUKLA, ENVER KRVAVAC, HUSSAIN HASANALI LADHANI, DAMON G. HOLMES
  • Publication number: 20180175802
    Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 21, 2018
    Inventors: Yu-Ting David Wu, Enver Krvavac, Joseph Gerard Schultz, Nick Yang, Damon G. Holmes, Shishir Ramasare Shukla, Jeffrey Kevin Jones, Elie A. Maalouf, Mario Bokatius