Patents by Inventor Shishuang Sun
Shishuang Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240095197Abstract: One example method of testing an electrical device comprises transmitting a data pattern to a memory device of the electrical device by a controller of the electrical device to provide a written data pattern to the memory device, wherein the data pattern replicates a resonant frequency of at least a portion of the electrical device, reading the written data pattern from the memory device with the controller, and comparing the written data pattern to the data pattern.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Sabareeshkumar Ravikumar, Shishuang Sun, Feng Wang, Ji Zhang
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Patent number: 11901310Abstract: An electronic assembly includes a substrate having a first surface and a second surface opposite to the first surface and a plurality of stiffening members coupled to the substrate. The substrate further includes a plurality of substrate interconnects. The electronic assembly further includes a plurality of semiconductor dies mounted on the first surface of the substrate. The plurality of semiconductor dies are electrically connected to each other via the plurality of substrate interconnects. The electronic assembly further includes a plurality of power supply modules mounted on the second surface of the substrate. Each power supply module is disposed opposite to a respective semiconductor die.Type: GrantFiled: September 19, 2019Date of Patent: February 13, 2024Assignee: Tesla, Inc.Inventors: Mengzhi Pang, Shishuang Sun, Ganesh Venkataramanan, William Arthur McGee, Steven Butler
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Patent number: 11894770Abstract: A Voltage Regulator Module (VRM) includes a first voltage rail circuit board oriented in a first plane having formed therein a first plurality of conductors and configured to produce a first rail voltage, a second voltage rail circuit board oriented in a second plane that is substantially parallel to the first plane having formed therein a second plurality of conductors and configured to produce a second rail voltage. The VRM also includes a first capacitor circuit board oriented in a third plane that is substantially perpendicular to the first plane and a second capacitor circuit board oriented in a fourth plane that is substantially parallel to the third plane. The VRM includes a plurality of conductors intercoupling the first voltage rail circuit board, the first capacitor circuit board, the second voltage rail circuit board, and the second capacitor circuit board.Type: GrantFiled: November 7, 2018Date of Patent: February 6, 2024Assignee: Tesla, Inc.Inventors: Shishuang Sun, Kevin Hurd, Satyan Chandra
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Publication number: 20240015887Abstract: A structure with an electronic component array positioned between two stacked printed circuit boards (600,606) is disclosed. The electronic components (502) of the array can be connected to the printed circuit board (600,606) by way of solder connections. Example electronic components (502) include capacitors. Related methods of manufacture are disclosed that involve applying heat to a solder paste array on a printed circuit board (600,606) to form solid conductors electrically connected to the electronic components (502).Type: ApplicationFiled: December 14, 2021Publication date: January 11, 2024Inventors: Jin Zhao, Satyan Chandra, Shishuang Sun
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Patent number: 11868286Abstract: One example method of testing an electrical device comprises transmitting a data pattern to a memory device of the electrical device by a controller of the electrical device to provide a written data pattern to the memory device, wherein the data pattern replicates a resonant frequency of at least a portion of the electrical device, reading the written data pattern from the memory device with the controller, and comparing the written data pattern to the data pattern.Type: GrantFiled: October 7, 2022Date of Patent: January 9, 2024Assignee: Waymo LLCInventors: Sabareeshkumar Ravikumar, Shishuang Sun, Feng Wang, Ji Zhang
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Publication number: 20220392836Abstract: An electronic assembly includes a mechanical carrier, a plurality of integrated circuits disposed on the mechanical carrier, a fan out package disposed on the plurality of integrated circuits, a plurality of singulated substrates disposed on the fan out package, a plurality of electronic components disposed on the plurality of singulated substrates, and at least one stiffness ring disposed on the plurality of singulated substrates. A method for constructing an electronic assembly includes identifying a group of known good singulated substrates, joining the group of known good singulated substrates into a substrate panel, attaching at least one bridge to the substrate panel that electrically couples at least two of the known good singulated substrates, and mounting a plurality of electronic components onto the substrate panel, each electronic component of the plurality of electronic components corresponding to a respective known good singulated substrate.Type: ApplicationFiled: June 17, 2022Publication date: December 8, 2022Inventors: Mengzhi Pang, Shishuang Sun, Ganesh Venkataramanan
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Patent number: 11494317Abstract: One example method of testing an electrical device comprises transmitting a data pattern to a memory device of the electrical device by a controller of the electrical device to provide a written data pattern to the memory device, wherein the data pattern replicates a resonant frequency of at least a portion of the electrical device, reading the written data pattern from the memory device with the controller, and comparing the written data pattern to the data pattern.Type: GrantFiled: December 29, 2020Date of Patent: November 8, 2022Assignee: Waymo LLCInventors: Sabareeshkumar Ravikumar, Shishuang Sun, Feng Wang, Ji Zhang
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Patent number: 11367680Abstract: An electronic assembly (100) includes a mechanical carrier (102), a plurality of integrated circuits (104A, 104B) disposed on the mechanical carrier, a fan out package (108) disposed on the plurality of integrated circuits, a plurality of singulated substrates (112A, 112B) disposed on the fan out package, a plurality of electronic components (114A, 114B) disposed on the plurality of singulated substrates, and at least one stiffness ring (116A, 116B, 116C) disposed on the plurality of singulated substrates.Type: GrantFiled: November 30, 2018Date of Patent: June 21, 2022Assignee: Tesla, Inc.Inventors: Mengzhi Pang, Shishuang Sun, Ganesh Venkataramanan
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Publication number: 20220051994Abstract: An electronic assembly includes a substrate having a first surface and a second surface opposite to the first surface and a plurality of stiffening members coupled to the substrate. The substrate further includes a plurality of substrate interconnects. The electronic assembly further includes a plurality of semiconductor dies mounted on the first surface of the substrate. The plurality of semiconductor dies are electrically connected to each other via the plurality of substrate interconnects. The electronic assembly further includes a plurality of power supply modules mounted on the second surface of the substrate. Each power supply module is disposed opposite to a respective semiconductor die.Type: ApplicationFiled: September 19, 2019Publication date: February 17, 2022Inventors: Mengzhi Pang, Shishuang Sun, Ganesh Venkataramanan, William Arthur McGee, Steven Butler
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Publication number: 20210351104Abstract: Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.Type: ApplicationFiled: September 19, 2019Publication date: November 11, 2021Inventors: Robert Yinan Cao, Mitchell Heschke, Mengzhi Pang, Shishuang Sun, Vijaykumar Krithivasan
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Publication number: 20210005546Abstract: An electronic assembly (100) includes a mechanical carrier (102), a plurality of integrated circuits (104A, 104B) disposed on the mechanical carrier, a fan out package (108) disposed on the plurality of integrated circuits, a plurality of singulated substrates (112A, 112B) disposed on the fan out package, a plurality of electronic components (114A, 114B) disposed on the plurality of singulated substrates, and at least one stiffness ring (116A, 116B, 116C) disposed on the plurality of singulated substrates.Type: ApplicationFiled: November 30, 2018Publication date: January 7, 2021Inventors: Mengzhi Pang, Shishuang Sun, Ganesh Venkataramanan
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Publication number: 20200266705Abstract: A Voltage Regulator Module (VRM) includes a first voltage rail circuit board oriented in a first plane having formed therein a first plurality of conductors and configured to produce a first rail voltage, a second voltage rail circuit board oriented in a second plane that is substantially parallel to the first plane having formed therein a second plurality of conductors and configured to produce a second rail voltage. The VRM also includes a first capacitor circuit board oriented in a third plane that is (substantially perpendicular to the first plane and a second capacitor circuit board oriented in a fourth plane that is substantially parallel to the third plane. The VRM includes a plurality of conductors intercoupling the first voltage rail circuit board, the first capacitor circuit board, the second voltage rail circuit board, and the second capacitor circuit board.Type: ApplicationFiled: November 7, 2018Publication date: August 20, 2020Inventors: Shishuang Sun, Kevin Hurd, Satyan Chandra
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Patent number: 7962870Abstract: A method for determining a current spectrum for a circuit design is provided. The method includes determining timing characteristics and power consumption characteristics for the circuit design. From the timing characteristics and the power consumption characteristics a time domain current waveform is constructed. The time domain current waveform is then converted to a frequency domain current waveform. With the frequency domain waveform, one skilled in the art can then identify a location and an amount of decoupling capacitors for a printed circuit board housing the circuit design based on the frequency domain current waveform. A computing system configured to perform the method is also provided.Type: GrantFiled: May 6, 2008Date of Patent: June 14, 2011Assignee: Altera CorporationInventors: Peter Boyle, Iliya G. Zamek, Zhe Li, Shishuang Sun, Bozidar Krsnik, James L. Drewniak, Xiaohe Chen, Sandeep Kamalakar Reddy Chandra
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Publication number: 20080288898Abstract: A method for determining a current spectrum for a circuit design is provided. The method includes determining timing characteristics and power consumption characteristics for the circuit design. From the timing characteristics and the power consumption characteristics a time domain current waveform is constructed. The time domain current waveform is then converted to a frequency domain current waveform. With the frequency domain waveform, one skilled in the art can then identify a location and an amount of decoupling capacitors for a printed circuit board housing the circuit design based on the frequency domain current waveform. A computing system configured to perform the method is also provided.Type: ApplicationFiled: May 6, 2008Publication date: November 20, 2008Inventors: Peter Boyle, Iliya G. Zamek, Zhe Li, Shishuang Sun, Bozidar Krsnik, James L. Drewniak