Patents by Inventor Shiva PAHWA
Shiva PAHWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12272164Abstract: A method for performing automated GUI-driven OpROM validation starts with a processor executing an automated test script; and in response to executing the automated test script, the processor is caused to remotely accessing a memory sub-system using a web driver and an interface. The processor causes a BIOS terminal window of the memory sub-system to be displayed on a display screen. The processor captures a screenshot of the BIOS terminal window and generating an image based on the screenshot. The processor converts the image to text using OCR and generates an output comprising BIOS configuration details based on the text using a machine-learning algorithm. The processor then analyzes the output to validate the memory sub-system when no errors are detected in the output or to flag the memory sub-system when errors are detected in the output. Other embodiments are described herein.Type: GrantFiled: August 17, 2023Date of Patent: April 8, 2025Assignee: Micron Technology, Inc.Inventors: Shiva Pahwa, Harsha Vardhana Gonchigara Vemanna, Sathyashankara Bhat Muguli
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Publication number: 20240411470Abstract: Respective temperature values for a plurality of dies of a memory device is obtained. Each respective temperature value is indicative of a temperature at a corresponding die of the plurality of dies of the memory device. The plurality of dies based on the respective temperature values, each die of the plurality of dies is ordered. A zone creation command directed to the memory device is received from a host. The zone creation command on the memory device on a die of the ordered plurality of dies is performed based on a temperature threshold.Type: ApplicationFiled: August 21, 2024Publication date: December 12, 2024Inventors: Shiva Pahwa, Abhilash Ramamurthy Nag, Sathyashankara Bhat Muguli
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Patent number: 12099737Abstract: Respective temperature values for a plurality of dies of a memory device is obtained. Each respective temperature value is indicative of a temperature at a corresponding die of the plurality of dies of the memory device. The plurality of dies based on the respective temperature values, each die of the plurality of dies is ordered. A zone creation command directed to the memory device is received from a host. The zone creation command on the memory device on a die of the ordered plurality of dies is performed based on a temperature threshold.Type: GrantFiled: August 9, 2022Date of Patent: September 24, 2024Assignee: Micron Technology, Inc.Inventors: Shiva Pahwa, Abhilash Ramamurthy Nag, Sathyashankara Bhat Muguli
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Patent number: 12068055Abstract: Exemplary methods, apparatuses, and systems include an environmental operations manager for controlling memory access of the memory device. The environmental operations manager receives a set of data bits for programming to a memory location. The environmental operations manager receives environmental condition data. The environmental operations manager delays programming of the set of data bits to the memory location and writing the set of data bits to a buffer location in response to determining that the environmental condition data satisfies a threshold.Type: GrantFiled: August 30, 2022Date of Patent: August 20, 2024Assignee: MICRON TECHNOLOGY, INC.Inventors: Abhilash Ramamurthy Nag, Suresh Reddy Yarragunta, Shiva Pahwa
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Publication number: 20240071441Abstract: Exemplary methods, apparatuses, and systems include an environmental operations manager for controlling memory access of the memory device. The environmental operations manager receives a set of data bits for programming to a memory location. The environmental operations manager receives environmental condition data. The environmental operations manager delays programming of the set of data bits to the memory location and writing the set of data bits to a buffer location in response to determining that the environmental condition data satisfies a threshold.Type: ApplicationFiled: August 30, 2022Publication date: February 29, 2024Inventors: Abhilash Ramamurthy Nag, Suresh Reddy Yarragunta, Shiva Pahwa
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Publication number: 20240070050Abstract: A method for performing automated GUI-driven OpROM validation starts with a processor executing an automated test script; and in response to executing the automated test script, the processor is caused to remotely accessing a memory sub-system using a web driver and an interface. The processor causes a BIOS terminal window of the memory sub-system to be displayed on a display screen. The processor captures a screenshot of the BIOS terminal window and generating an image based on the screenshot. The processor converts the image to text using OCR and generates an output comprising BIOS configuration details based on the text using a machine-learning algorithm. The processor then analyzes the output to validate the memory sub-system when no errors are detected in the output or to flag the memory sub-system when errors are detected in the output. Other embodiments are described herein.Type: ApplicationFiled: August 17, 2023Publication date: February 29, 2024Inventors: Shiva Pahwa, Harsha Vardhana Gonchigara Vemanna, Sathyashankara Bhat Muguli
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Publication number: 20240074110Abstract: Example embodiments are directed to an input/output (IO) bracket that may be used in a solid-state drive (SSD), the IO bracket comprises a faceplate and at least one heat pipe coupled to the faceplate that extends horizontally from a surface of the faceplate. The at least one heat pipe is configured to be coupled to a controller of the SSD in order to transfer heat from the controller out of the SSD. By coupling the controller to the heat pipe instead of a main heatsink, the main heatsink can efficiently dissipate heat from remaining components of the SSD.Type: ApplicationFiled: August 29, 2023Publication date: February 29, 2024Inventors: Shiva Pahwa, Abhiash Ramamurthy Nag, Suresh Reddy Yarragunta
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Publication number: 20240061487Abstract: Aspects of the present disclosure configure a memory sub-system processor, to use a thermoelectric generator during a power loss event. The processor delivers power to a set of memory components from a power source. The processor detects a power failure event associated with the power source and, in response to detecting the power failure event, receives holdup power from the thermoelectric generator. The processor delivers the holdup power from the thermoelectric generator to the set of memory components.Type: ApplicationFiled: August 14, 2023Publication date: February 22, 2024Inventors: Abhilash Ramamurthy Nag, Shiva Pahwa, Suresh Reddy Yarragunta
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Publication number: 20240012757Abstract: Systems, methods, and apparatus related to memory devices. In one approach, a memory device stores data received from sensors of a vehicle. The memory device includes an offloading engine used to perform computations on portions of the stored data. The offloaded computations include processing using a neural network. An output from the neural network generates an instruction for a processor of the vehicle. The processor of the vehicle reads instruction from a cache of the memory device. Based on the read instruction, the processor of the vehicle controls one or more vehicle functions such as braking, etc.Type: ApplicationFiled: July 8, 2022Publication date: January 11, 2024Inventors: Abhilash Nag, Shiva Pahwa, Sathyashankara Bhat Muguli, Ravi Kiran Gummaluri
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Publication number: 20230185471Abstract: Respective temperature values for a plurality of dies of a memory device is obtained. Each respective temperature value is indicative of a temperature at a corresponding die of the plurality of dies of the memory device. The plurality of dies based on the respective temperature values, each die of the plurality of dies is ordered. A zone creation command directed to the memory device is received from a host. The zone creation command on the memory device on a die of the ordered plurality of dies is performed based on a temperature threshold.Type: ApplicationFiled: August 9, 2022Publication date: June 15, 2023Inventors: Shiva Pahwa, Abhilash Ramamurthy Nag, Sathyashankara Bhat Muguli
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Patent number: 11656786Abstract: An operation method of a storage device includes, when receiving a write request for a first namespace among a plurality of namespaces logically divided and recognized by an external host device, determining whether an available space of the first namespace is insufficient; when it is determined that the available space of the first namespace is insufficient, allocating a portion of an available space of a second namespace different from the first namespace from among the plurality of namespaces to a temporary space for the first namespace; transmitting information about a lack of the available space of the first namespace and information about the allocation of the temporary space of the second namespace to the external host device; and storing data corresponding to the write request for the first namespace in the temporary space of the second namespace.Type: GrantFiled: February 19, 2021Date of Patent: May 23, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Gururaj Morabad, Shiva Pahwa
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Patent number: 11281379Abstract: An operating method of a storage device which includes one or more nonvolatile memories includes storing reference data in a first memory area of the one or more nonvolatile memories, when an access frequency of the reference data exceeds a first reference value, storing first replicated data identical to the reference data in a second memory area of the one or more nonvolatile memories, after the first replicated data are stored, when an access frequency of the reference data or the first replicated data exceeds the first reference value, storing second replicated data identical to the reference data in a third memory area of the one or more nonvolatile memories, and managing a second and a third physical addresses of the second and the third memory areas such that a first physical address of the first memory area corresponds to the second and the third physical addresses.Type: GrantFiled: May 15, 2020Date of Patent: March 22, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Shiva Pahwa
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Publication number: 20220004333Abstract: An operation method of a storage device includes, when receiving a write request for a first namespace among a plurality of namespaces logically divided and recognized by an external host device, determining whether an available space of the first namespace is insufficient; when it is determined that the available space of the first namespace is insufficient, allocating a portion of an available space of a second namespace different from the first namespace from among the plurality of namespaces to a temporary space for the first namespace; transmitting information about a lack of the available space of the first namespace and information about the allocation of the temporary space of the second namespace to the external host device; and storing data corresponding to the write request for the first namespace in the temporary space of the second namespace.Type: ApplicationFiled: February 19, 2021Publication date: January 6, 2022Inventors: Gururaj MORABAD, Shiva PAHWA
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Patent number: 11216191Abstract: A storage device includes a nonvolatile memory device, and a controller that receives a write command, data, and a signature associated with the data from an external device, generates a first hash value from the data, generates a second hash value from the signature, generates an output hash value based on the first hash value and the second hash, and detects whether the data received from the external device are previously written in the nonvolatile memory device, by using the output hash value.Type: GrantFiled: March 2, 2020Date of Patent: January 4, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Shiva Pahwa, Alex Mohandas
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Publication number: 20210089219Abstract: An operating method of a storage device which includes one or more nonvolatile memories includes storing reference data in a first memory area of the one or more nonvolatile memories, when an access frequency of the reference data exceeds a first reference value, storing first replicated data identical to the reference data in a second memory area of the one or more nonvolatile memories, after the first replicated data are stored, when an access frequency of the reference data or the first replicated data exceeds the first reference value, storing second replicated data identical to the reference data in a third memory area of the one or more nonvolatile memories, and managing a second and a third physical addresses of the second and the third memory areas such that a first physical address of the first memory area corresponds to the second and the third physical addresses.Type: ApplicationFiled: May 15, 2020Publication date: March 25, 2021Inventor: SHIVA PAHWA
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Publication number: 20200393975Abstract: A storage device includes a nonvolatile memory device, and a controller that receives a write command, data, and a signature associated with the data from an external device, generates a first hash value from the data, generates a second hash value from the signature, generates an output hash value based on the first hash value and the second hash, and detects whether the data received from the external device are previously written in the nonvolatile memory device, by using the output hash value.Type: ApplicationFiled: March 2, 2020Publication date: December 17, 2020Inventors: SHIVA PAHWA, ALEX MOHANDAS
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Patent number: 10416895Abstract: A storage device may include one or more nonvolatile memory devices and a controller. The nonvolatile memory devices may be configured to store target data. When the number of operations which is performed on the target data is equal to or greater than a first reference value, the controller may be configured to store duplicated data, which is identical to some or all portions of the target data, in the nonvolatile memory devices. When the number of operations performed on the target data becomes equal to or smaller than a second reference value after the duplicated data is generated, the controller may be configured to invalidate the duplicated data.Type: GrantFiled: December 13, 2017Date of Patent: September 17, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Shiva Pahwa, Alex Mohandas
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Patent number: 10275172Abstract: In a method of operating a SSD device, which includes a nonvolatile memory device having a plurality of memory blocks, the plurality of memory blocks is operated in a single level cell (SLC) mode, an access pattern for each of a plurality of data units stored in each of the plurality of memory blocks of the nonvolatile memory device is periodically analyzed, an operation mode of at least one of the plurality of memory blocks is switched to a multi level cell (MLC) mode based on the analysis result, and at least one of data units is moved to a memory block operating in the MLC mode based on the analysis result.Type: GrantFiled: January 23, 2017Date of Patent: April 30, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Shiva Pahwa, Alex Mohandas
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Publication number: 20180232144Abstract: A storage device may include one or more nonvolatile memory devices and a controller. The nonvolatile memory devices may be configured to store target data. When the number of operations which is performed on the target data is equal to or greater than a first reference value, the controller may be configured to store duplicated data, which is identical to some or all portions of the target data, in the nonvolatile memory devices. When the number of operations performed on the target data becomes equal to or smaller than a second reference value after the duplicated data is generated, the controller may be configured to invalidate the duplicated data.Type: ApplicationFiled: December 13, 2017Publication date: August 16, 2018Inventors: Shiva Pahwa, Alex Mohandas
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Publication number: 20180032275Abstract: In a method of operating a SSD device, which includes a nonvolatile memory device having a plurality of memory blocks, the plurality of memory blocks is operated in a single level cell (SLC) mode, an access pattern for each of a plurality of data units stored in each of the plurality of memory blocks of the nonvolatile memory device is periodically analyzed, an operation mode of at least one of the plurality of memory blocks is switched to a multi level cell (MLC) mode based on the analysis result, and at least one of data units is moved to a memory block operating in the MLC mode based on the analysis result.Type: ApplicationFiled: January 23, 2017Publication date: February 1, 2018Inventors: Shiva PAHWA, Alex MOHANDAS