Abstract: The present disclosure relates to systems and methods for providing personalized retrievals of items. The systems and methods create a user-specific morph operator for a user that captures learned user preferences for the user. The systems and methods use the user-specific morph operator to transform a generic embedding for a query into a personalized embedding for the query. The systems and method use the personalized embedding to retrieve items based on the user preferences to present in response to the query.

Abstract: Clock generation circuit generating multiple divided signals satisfying respective desired offsets. A phase locked loop (PLL) is used to generate a PLL output having a frequency which is a desired multiple of that of a reference clock. The circuit divides the PLL output by a corresponding divisor to generate a corresponding divided signal, wherein each divided signal is offset from a common reference by at least an associated desired time offset. The common reference is timed with respect to the reference clock when the reference clock is available and with respect to a time reference signal otherwise. This arrangement is extended to use the internal time reference signal even for the cases where the reference clock is present by blocking the reference clock while the output systems across PLLs are aligned using the internal time reference signal to ensure desired offsets across different PLLs with a small uncertainty.

Abstract: Clock generation circuit generating multiple divided signals satisfying respective desired offsets. A phase locked loop (PLL) is used to generate a PLL output having a frequency which is a desired multiple of that of a reference clock. The circuit divides the PLL output by a corresponding divisor to generate a corresponding divided signal, wherein each divided signal is offset from a common reference by at least an associated desired time offset. The common reference is timed with respect to the reference clock when the reference clock is available and with respect to a time reference signal otherwise. This arrangement is extended to use the internal time reference signal even for the cases where the reference clock is present by blocking the reference clock while the output systems across PLLs are aligned using the internal time reference signal to ensure desired offsets across different PLLs with a small uncertainty.

Abstract: A system and method for transferring items in a storage facility are provided. The storage facility includes a storage system that includes bins, a control server, and a sensing system. A pick-put operation on an inventory item is performed by picking the inventory item from a robotic apparatus by an operator and storing the inventory item in a corresponding bin of the storage system. The control server receives sensor signals when the sensing system automatically senses a pick-up of the inventory item from the robotic apparatus and placement of the inventory item in the corresponding bin of the storage system. The reception of the sensor signals by the control server indicates execution of the pick-put operation. Thus, a need for the operator to manually scan the inventory item during the pick-up or press any buttons on the storage system to indicate completion of the pick-put operation is eliminated.

Abstract: Clock generation circuit generating multiple divided signals satisfying respective desired offsets. A phase locked loop (PLL) is used to generate a PLL output having a frequency which is a desired multiple of that of a reference clock. The circuit divides the PLL output by a corresponding divisor to generate a corresponding divided signal, wherein each divided signal is offset from a common reference by at least an associated desired time offset. The common reference is timed with respect to the reference clock when the reference clock is available and with respect to a time reference signal otherwise. This arrangement is extended to use the internal time reference signal even for the cases where the reference clock is present by blocking the reference clock while the output systems across PLLs are aligned using the internal time reference signal to ensure desired offsets across different PLLs with a small uncertainty.

Abstract: A phase-locked loop (PLL) provided according to an aspect of the present disclosure includes a phase detector, a low-pass filter, an oscillator, an output block and a phase locking block. The oscillator generates an intermediate clock and the output block generates each of successive cycles of a feedback clock on counting a pre-determined number of cycles of the intermediate clock. The phase locking block, upon detecting the PLL being out of phase-lock, controls the operation of the output block to obtain phase-lock in the PLL within two cycles of the input clock from the time of detection of the PLL being out of phase-lock.

Abstract: Systems and methods generate and use a digital twin in a hydrocarbon system. The systems and methods can perform the following operations: (1) performing a plurality of simulations in a hyperdimensional space to generate outputs; (2) using the outputs of the plurality of simulations to generate one or more reduced order models (ROMs) using a regression technique or a machine learning technique; (3) generating a digital twin of the hydrocarbon system by instantiating the one or more ROMs at an operational point of the hydrocarbon system, and configuring the digital twin to use real-time data obtained from the hydrocarbon system; and (4) estimating values of one or more variables of the hydrocarbon system in real-time using the digital twin.