Abstract: Methods and apparatus for management of thermal throttling in data storage devices are provided. One such data storage device includes a non-volatile memory (NVM), an always-on (AON) memory, and a processor coupled to the NVM and AON memory. The processor is configured to: receive an indication that a temperature of the data storage device exceeds a first temperature threshold, while the data storage device is in a powered-on state; store, responsive to the indication, status information of the data storage device in the AON memory; cause, responsive to the indication and the stored status information, the data storage device to enter a low power state wherein the only component of the data storage device that remains on is the AON memory; and restore, responsive to the data storage device resuming the powered-on state, the status information to the data storage device from the AON memory.

Abstract: Storage devices include a memory array which stores host data received from a host computing device. During normal operations, the storage device may encounter a fatal error which can halt functionality. To restore functionality without system disconnection or third-party interventions, the storage device can store recovery data within a host memory buffer prior to encountering a fatal error. The recovery data can be replay protected memory data and/or firmware recovery data that can be written to the host memory buffer upon power on or during a firmware update. When a fatal error occurs, the recovery data can be accessed to try and rebuild file and mapping systems to restore full operation of the storage device. When full operational restoration is not possible, host data can at least be copied from the storage device prior to utilizing firmware recovery data to restore the storage device to an erased but functional state.

Abstract: Methods and apparatus for management of thermal throttling in data storage devices are provided. One such data storage device includes a non-volatile memory (NVM), an always-on (AON) memory, and a processor coupled to the NVM and AON memory. The processor is configured to: receive an indication that a temperature of the data storage device exceeds a first temperature threshold, while the data storage device is in a powered-on state; store, responsive to the indication, status information of the data storage device in the AON memory; cause, responsive to the indication and the stored status information, the data storage device to enter a low power state wherein the only component of the data storage device that remains on is the AON memory; and restore, responsive to the data storage device resuming the powered-on state, the status information to the data storage device from the AON memory.