Patents by Inventor Shivam KALLA

Shivam KALLA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11881280
    Abstract: An integrated circuit includes a non-volatile memory, a charge pump that generates high voltages for programming operations of the non-volatile memory array, and a charge pump regulator that controls a slew rate of the charge pump. The charge pump regulator generates a sense current indicative of the slew rate and adjusts a frequency of a clock signal provided to the charge pump based on the sense current.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: January 23, 2024
    Assignee: STMicroelectronics International N.V.
    Inventors: Shivam Kalla, Vikas Rana
  • Publication number: 20220172751
    Abstract: An integrated circuit includes a non-volatile memory, a charge pump that generates high voltages for programming operations of the non-volatile memory array, and a charge pump regulator that controls a slew rate of the charge pump. The charge pump regulator generates a sense current indicative of the slew rate and adjusts a frequency of a clock signal provided to the charge pump based on the sense current.
    Type: Application
    Filed: November 23, 2021
    Publication date: June 2, 2022
    Applicant: STMicroelectronics International N.V.
    Inventors: Shivam KALLA, Vikas RANA
  • Patent number: 11258358
    Abstract: A charge pump circuit generates a charge pump output signal at a first node and is enabled by a control signal. A diode has an anode coupled to the first node and a cathode coupled to a second node. A current mirror arrangement sources a first current to the second node and sinks a second current from a third node. A comparator causes the control signal to direct the charge pump circuit to generate the charge pump output signal as having a voltage that ramps upwardly in magnitude (but negative in sign) if the voltage at the second node is greater than the voltage at the third node, and causes the control signal to direct the charge pump circuit to cease the ramping of the voltage of the charge pump output signal if the voltage at the second node is at least equal to the voltage at the third node.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: February 22, 2022
    Assignee: STMicroelectronics International N.V.
    Inventors: Vikas Rana, Shivam Kalla
  • Patent number: 11070128
    Abstract: A charge pump circuit generates a charge pump output signal at a first node and is enabled by a charge pump control signal. A diode has first and second terminals coupled to first and second nodes. A comparator has an inverting input coupled to the second node and a non-inverting input coupled to a third node, and causes generation of the charge pump control signal. A first current mirror produces a first current at the second node, and a second current mirror produces a second current (equal in magnitude to the first current) at the third node. The first terminal and second terminals may be a cathode and an anode. The first current mirror may be a current sink sinking a first current from the second node. The second current mirror may be current source sourcing a second current (equal in magnitude to the first current) to the third node.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: July 20, 2021
    Assignee: STMicroelectronics International N.V.
    Inventors: Vikas Rana, Shivam Kalla
  • Publication number: 20200235660
    Abstract: A charge pump circuit generates a charge pump output signal at a first node and is enabled by a control signal. A diode has an anode coupled to the first node and a cathode coupled to a second node. A current mirror arrangement sources a first current to the second node and sinks a second current from a third node. A comparator causes the control signal to direct the charge pump circuit to generate the charge pump output signal as having a voltage that ramps upwardly in magnitude (but negative in sign) if the voltage at the second node is greater than the voltage at the third node, and causes the control signal to direct the charge pump circuit to cease the ramping of the voltage of the charge pump output signal if the voltage at the second node is at least equal to the voltage at the third node.
    Type: Application
    Filed: January 14, 2020
    Publication date: July 23, 2020
    Applicant: STMicroelectronics International N.V.
    Inventors: Vikas RANA, Shivam KALLA
  • Publication number: 20200235659
    Abstract: A charge pump circuit generates a charge pump output signal at a first node and is enabled by a charge pump control signal. A diode has first and second terminals coupled to first and second nodes. A comparator has an inverting input coupled to the second node and a non-inverting input coupled to a third node, and causes generation of the charge pump control signal. A first current mirror produces a first current at the second node, and a second current mirror produces a second current (equal in magnitude to the first current) at the third node. The first terminal and second terminals may be a cathode and an anode. The first current mirror may be a current sink sinking a first current from the second node. The second current mirror may be current source sourcing a second current (equal in magnitude to the first current) to the third node.
    Type: Application
    Filed: December 16, 2019
    Publication date: July 23, 2020
    Applicant: STMicroelectronics International N.V.
    Inventors: Vikas RANA, Shivam KALLA